PIC17C4X
Figure 19-2: External Clock Timing............................... 184
Figure 19-3: CLKOUT and I/O Timing........................... 185
Figure 19-4: Reset, Watchdog Timer,
Table 6-2:
EPROM Memory Access Time
Ordering Suffix ............................................31
Special Function Registers..........................34
Interrupt - Table Write Interaction................45
Performance Comparison ...........................49
PORTA Functions .......................................54
Registers/Bits Associated with PORTA.......54
PORTB Functions .......................................57
Registers/Bits Associated with PORTB.......57
PORTC Functions .......................................59
Registers/Bits Associated with PORTC.......59
PORTD Functions .......................................61
Registers/Bits Associated with PORTD.......61
PORTE Functions .......................................63
Registers/Bits Associated with PORTE.......63
Registers/Bits Associated with Timer0........70
Turning On 16-bit Timer ..............................74
Summary of Timer1 and Timer2
Registers .....................................................74
PWM Frequency vs. Resolution at
25 MHz........................................................76
Registers/Bits Associated with PWM ..........77
Registers Associated with Capture .............79
Summary of TMR1, TMR2, and TMR3
Registers .....................................................81
Baud Rate Formula .....................................86
Registers Associated with Baud Rate
Generator ....................................................86
Baud Rates for Synchronous Mode ............87
Baud Rates for Asynchronous Mode...........88
Registers Associated with Asynchronous
Transmission...............................................90
Registers Associated with Asynchronous
Reception ....................................................92
Registers Associated with Synchronous
Master Transmission...................................94
Registers Associated with Synchronous
Master Reception ........................................96
Registers Associated with Synchronous
Table 6-3:
Table 7-1:
Table 8-1:
Table 9-1:
Table 9-2:
Table 9-3:
Table 9-4:
Table 9-5:
Table 9-6:
Table 9-7:
Table 9-8:
Table 9-9:
Table 9-10:
Table 11-1:
Table 12-1:
Table 12-2:
Oscillator Start-Up Timer, and
Power-Up Timer Timing............................ 186
Figure 19-5: Timer0 Clock Timings............................... 187
Figure 19-6: Timer1, Timer2, and Timer3 Clock
Timings ..................................................... 187
Figure 19-7: Capture Timings ....................................... 188
Figure 19-8: PWM Timings ........................................... 188
Figure 19-9: USART Module: Synchronous
Transmission (Master/Slave) Timing ........ 189
Figure 19-10: USART Module: Synchronous
Receive (Master/Slave) Timing................. 189
Figure 19-11: Memory Interface Write Timing
(Not Supported in PIC17LC4X Devices)... 190
Figure 19-12: Memory Interface Read Timing
(Not Supported in PIC17LC4X Devices)... 191
Figure 20-1: Typical RC Oscillator Frequency vs.
Temperature ............................................. 193
Figure 20-2: Typical RC Oscillator Frequency
vs. VDD...................................................... 194
Figure 20-3: Typical RC Oscillator Frequency
vs. VDD...................................................... 194
Figure 20-4: Typical RC Oscillator Frequency
vs. VDD...................................................... 195
Figure 20-5: Transconductance (gm) of LF Oscillator
vs. VDD...................................................... 196
Figure 20-6: Transconductance (gm) of XT Oscillator
vs. VDD...................................................... 196
Figure 20-7: Typical IDD vs. Frequency (External
Clock 25°C)............................................... 197
Figure 20-8: Maximum IDD vs. Frequency (External
Clock 125°C to -40°C) .............................. 197
Figure 20-9: Typical IPD vs. VDD Watchdog
Disabled 25°C........................................... 198
Figure 20-10: Maximum IPD vs. VDD Watchdog
Disabled.................................................... 198
Figure 20-11: Typical IPD vs. VDD Watchdog
Enabled 25°C............................................ 199
Figure 20-12: Maximum IPD vs. VDD Watchdog
Enabled..................................................... 199
Figure 20-13: WDT Timer Time-Out Period vs. VDD....... 200
Figure 20-14: IOH vs. VOH, VDD = 3V.............................. 200
Figure 20-15: IOH vs. VOH, VDD = 5V.............................. 201
Figure 20-16: IOL vs. VOL, VDD = 3V............................... 201
Figure 20-17: IOL vs. VOL, VDD = 5V............................... 202
Figure 20-18: VTH (Input Threshold Voltage) of
I/O Pins (TTL) VS. VDD.............................. 202
Figure 20-19: VTH, VIL of I/O Pins (Schmitt Trigger)
VS. VDD ..................................................... 203
Figure 20-20: VTH (Input Threshold Voltage) of OSC1
Input (In XT and LF Modes) vs. VDD........ 203
Table 12-3:
Table 12-4:
Table 12-5:
Table 12-6:
Table 13-1:
Table 13-2:
Table 13-3:
Table 13-4:
Table 13-5:
Table 13-6:
Table 13-7:
Table 13-8:
Table 13-9:
Slave Transmission.....................................98
Table 13-10: Registers Associated with Synchronous
Slave Reception ..........................................98
Table 14-1:
Table 14-2:
Configuration Locations.............................100
Capacitor Selection for Ceramic
Resonators................................................101
Capacitor Selection for Crystal
OscillatoR..................................................101
Registers/Bits Associated with the
Watchdog Timer........................................104
Opcode Field Descriptions ........................107
PIC17CXX Instruction Set.........................110
development tools from microchip.............146
Cross Reference of Device Specs for
Table 14-3:
Table 14-4:
Table 15-1:
Table 15-2:
Table 16-1:
Table 17-1:
Oscillator Configurations and Frequencies
of Operation (Commercial Devices) ..........148
External Clock Timing Requirements........155
CLKOUT and I/O Timing Requirements....156
Reset, Watchdog Timer,
LIST OF TABLES
Table 1-1:
Table 3-1:
Table 4-1:
Table 4-2:
Table 4-3:
PIC17CXX Family of Devices....................... 6
Pinout Descriptions..................................... 12
Time-Out in Various Situations................... 16
STATUS Bits and Their Significance.......... 16
Reset Condition for the Program Counter
and the CPUSTA Register.......................... 16
Initialization Conditions For Special
Table 17-2:
Table 17-3:
Table 17-4:
Oscillator Start-Up Timer and
Power-Up Timer Requirements.................157
Timer0 Clock Requirements......................158
Timer1, Timer2, and Timer3 Clock
Table 17-5:
Table 17-6:
Table 4-4:
Function Registers...................................... 19
Interrupt Vectors/Priorities .......................... 25
Mode Memory Access ................................ 30
Requirements............................................158
Capture Requirements ..............................159
PWM Requirements ..................................159
Table 5-1:
Table 6-1:
Table 17-7:
Table 17-8:
1996 Microchip Technology Inc.
DS30412C-page 233
MICROCHIP [ MICROCHIP ]
