PIC17C75X
FIGURE 6-4: PIE2 REGISTER (ADDRESS: 11h, BANK 4)
R/W - 0 R/W - 0 R/W - 0
U - 0
—
R/W - 0 R/W - 0 R/W - 0 R/W - 0
CA4IE CA3IE TX2IE RC2IE
bit0
R = Readable bit
W = Writable bit
-n = Value at POR reset
SSPIE BCLIE
ADIE
bit7
bit 7:
bit 6:
bit 5:
SSPIE: Synchronous Serial Port Interrupt Enable
1 = Enable SSP Interrupt
0 = Disable SSP Interrupt
BCLIE: Bus Collision Interrupt Enable
1 = Enable Bus Collision Interrupt
0 = Disable Bus Collision Interrupt
ADIE: A/D Module Interrupt Enable
1 = Enable A/D Module Interrupt
0 = Disable A/D Module Interrupt
bit 4:
bit 3:
Unimplemented: Read as ‘0’
CA4IE: Capture4 Interrupt Enable
1 = Enable Capture4 Interrupt
0 = Disable Capture4 Interrupt
bit 2:
bit 1:
bit 0:
CA3IE: Capture3 Interrupt Enable
1 = Enable Capture3 Interrupt
0 = Disable Capture3 Interrupt
TX2IE: USART2 Transmit Interrupt Enable
1 = Enable USART2 Transmit Interrupt
0 = Disable USART2 Transmit Interrupt
RC2IE: USART2 Receive Interrupt Enable
1 = Enable USART2 Receive Interrupt
0 = Disable USART2 Receive Interrupt
DS30264A-page 32
Preliminary
1997 Microchip Technology Inc.