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PIC16F73-I/SO 参数 Datasheet PDF下载

PIC16F73-I/SO图片预览
型号: PIC16F73-I/SO
PDF下载: 下载PDF文件 查看货源
内容描述: 40分之28引脚, 8位CMOS闪存微控制器 [28/40-pin, 8-bit CMOS FLASH Microcontrollers]
分类和应用: 闪存微控制器
文件页数/大小: 174 页 / 3853 K
品牌: MICROCHIP [ MICROCHIP TECHNOLOGY ]
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PIC16F7X
10.0
UNIVERSAL SYNCHRONOUS
ASYNCHRONOUS RECEIVER
TRANSMITTER (USART)
The USART can be configured in the following modes:
• Asynchronous (full duplex)
• Synchronous - Master (half duplex)
• Synchronous - Slave (half duplex)
Bit SPEN (RCSTA<7>) and bits TRISC<7:6> have to
be set in order to configure pins RC6/TX/CK and
RC7/RX/DT as the Universal Synchronous Asynchro-
nous Receiver Transmitter.
The Universal Synchronous Asynchronous Receiver
Transmitter (USART) module is one of the two serial
I/O modules. (USART is also known as a Serial Com-
munications Interface or SCI.) The USART can be con-
figured as a full duplex asynchronous system that can
communicate with peripheral devices, such as CRT ter-
minals and personal computers, or it can be configured
as a half duplex synchronous system that can commu-
nicate with peripheral devices, such as A/D or D/A inte-
grated circuits, serial EEPROMs, etc.
REGISTER 10-1:
TXSTA: TRANSMIT STATUS AND CONTROL REGISTER (ADDRESS 98h)
R/W-0
CSRC
bit 7
R/W-0
TX9
R/W-0
TXEN
R/W-0
SYNC
U-0
R/W-0
BRGH
R-1
TRMT
R/W-0
TX9D
bit 0
bit 7
CSRC:
Clock Source Select bit
Asynchronous mode:
Don’t care
Synchronous mode:
1
= Master mode (clock generated internally from BRG)
0
= Slave mode (clock from external source)
TX9:
9-bit Transmit Enable bit
1
= Selects 9-bit transmission
0
= Selects 8-bit transmission
TXEN:
Transmit Enable bit
1
= Transmit enabled
0
= Transmit disabled
Note:
SREN/CREN overrides TXEN in Sync mode.
SYNC:
USART Mode Select bit
1
= Synchronous mode
0
= Asynchronous mode
Unimplemented:
Read as '0'
BRGH:
High Baud Rate Select bit
Asynchronous mode:
1
= High speed
0
= Low speed
Synchronous mode:
Unused in this mode
TRMT:
Transmit Shift Register Status bit
1
= TSR empty
0
= TSR full
TX9D:
9th bit of Transmit Data
Can be parity bit
Legend:
R = Readable bit
- n = Value at POR reset
W = Writable bit
’1’ = Bit is set
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
x = Bit is unknown
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
2002 Microchip Technology Inc.
DS30325B-page 69