PIC16F913/914/916/917/946
2.2.2.5
PIE2 Register
The PIE2 register contains the interrupt enable bits, as
shown in Register 2-5.
Note:
Bit PEIE of the INTCON register must be
set to enable any peripheral interrupt.
REGISTER 2-5:
PIE2: PERIPHERAL INTERRUPT ENABLE REGISTER 2
R/W-0
OSFIE
bit 7
R/W-0
C2IE
R/W-0
C1IE
R/W-0
LCDIE
U-0
—
R/W-0
LVDIE
U-0
—
R/W-0
CCP2IE(1)
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
bit 7
bit 6
bit 5
bit 4
OSFIE: Oscillator Fail Interrupt Enable bit
1= Enables oscillator fail interrupt
0= Disables oscillator fail interrupt
C2IE: Comparator C2 Interrupt Enable bit
1= Enables Comparator C2 interrupt
0= Disables Comparator C2 interrupt
C1IE: Comparator C1 Interrupt Enable bit
1= Enables Comparator C1 interrupt
0= Disables Comparator C1 interrupt
LCDIE: LCD Module Interrupt Enable bit
1= Enables LCD interrupt
0= Disables LCD interrupt
bit 3
bit 2
Unimplemented: Read as ‘0’
LVDIE: Low Voltage Detect Interrupt Enable bit
1= Enables LVD Interrupt
0= Disables LVD Interrupt
bit 1
bit 0
Unimplemented: Read as ‘0’
CCP2IE: CCP2 Interrupt Enable bit(1)
1= Enables the CCP2 interrupt
0= Disables the CCP2 interrupt
Note 1: PIC16F914/PIC16F917/PIC16F946 only.
DS41250F-page 36
© 2007 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
