PIC16F913/914/916/917/946
FIGURE 8-8:
COMPARATOR VOLTAGE REFERENCE BLOCK DIAGRAM
16 Stages
8R
R
R
R
R
VDD
VRR
8R
16-1 Analog
MUX
VREN
15
14
CVREF to
Comparator
Input
2
1
0
(1)
VR<3:0>
VREN
VR<3:0> = 0000
VRR
Note 1: Care should be taken to ensure VREF remains
within the comparator common mode input range.
See Section 19.0 “Electrical Specifications”
for more detail.
TABLE 8-2:
SUMMARY OF REGISTERS ASSOCIATED WITH THE COMPARATOR AND VOLTAGE
REFERENCE MODULES
Value on
Value on
POR, BOR
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
all other
Resets
ANSEL
CMCON0
CMCON1
INTCON
PIE2
ANS7
C2OUT
—
ANS6
C1OUT
—
ANS5
C2INV
—
ANS4
C1INV
—
ANS3
CIS
—
ANS2
CM2
—
ANS1
CM1
T1GSS
INTF
—
ANS0
CM0
1111 1111 1111 1111
0000 0000 0000 0000
---- --10 ---- --10
0000 000x 0000 000x
0000 -0-0 0000 -0-0
0000 -0-0 0000 -0-0
xxxx xxxx uuuu uuuu
1111 1111 1111 1111
0-0- 0000 0000 0000
C2SYNC
RBIF
GIE
PEIE
C2IE
C2IF
RA6
T0IE
C1IE
C1IF
RA5
INTE
LCDIE
LCDIF
RA4
RBIE
—
T0IF
LVDIE
LVDIF
RA2
OSFIE
OSFIF
RA7
CCP2IE
CCP2IF
RA0
PIR2
—
—
PORTA
TRISA
RA3
RA1
TRISA7
VREN
TRISA6 TRISA5 TRISA4 TRISA3 TRISA2 TRISA1
VRR VR3 VR2 VR1
TRISA0
VR0
VRCON
—
—
Legend:
x= unknown, u= unchanged, -= unimplemented, read as ‘0’. Shaded cells are not used for comparator.
© 2007 Microchip Technology Inc.
DS41250F-page 119