PIC16F913/914/916/917/946
3.2.1
PIN DESCRIPTIONS AND
DIAGRAMS
Each PORTA pin is multiplexed with other functions. The
pins and their combined functions are briefly described
here. For specific information about individual functions,
refer to the appropriate section in this data sheet.
3.2.1.1
RA0/AN0/C1-/SEG12
Figure 3-1 shows the diagram for this pin. The RA0 pin
is configurable to function as one of the following:
• a general purpose I/O
• an analog input for the ADC
• an analog input for Comparator C1
• an analog output for the LCD
FIGURE 3-1:
BLOCK DIAGRAM OF RA0
Data Bus
D
Q
WR PORTA
WR TRISA
VDD
VSS
CK
Q
Data Latch
D
Q
I/O Pin
CK
Q
TRIS Latch
Analog Input or
SE12 and LCDEN
TTL
Input Buffer
RD TRISA
SE12 and LCDEN
RD PORTA
SEG12
SE12 and LCDEN
To A/D Converter and Comparator
© 2007 Microchip Technology Inc.
DS41250F-page 45