PIC16F913/914/916/917/946
TABLE 3-2:
SUMMARY OF REGISTERS ASSOCIATED WITH PORTB
Value on
POR, BOR
Value on all
other Resets
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
INTCON
IOCB
GIE
PEIE
T0IE
INTE
RBIE
—
T0IF
—
INTF
—
RBIF
—
0000 000x
0000 ----
0000 000x
0000 ----
IOCB7
IOCB6
IOCB5
IOCB4
LCDCON
LCDSE0
LCDSE1
OPTION_REG
PORTB
LCDEN
SE7
SLPEN
SE6
WERR
SE5
VLCDEN
SE4
CS1
SE3
CS0
SE2
LMUX1
SE1
LMUX0
SE0
0001 0011
0000 0000
0000 0000
1111 1111
xxxx xxxx
1111 1111
1111 1111
0001 0011
uuuu uuuu
uuuu uuuu
1111 1111
uuuu uuuu
1111 1111
1111 1111
SE15
SE14
SE13
SE12
SE11
PSA
SE10
PS2
SE9
SE8
RBPU
RB7
INTEDG
RB6
T0CS
RB5
T0SE
PS1
PS0
RB4
RB3
RB2
RB1
RB0
TRISB
TRISB7
WPUB7
TRISB6
WPUB6
TRISB5
WPUB5
TRISB4
WPUB4
TRISB3
WPUB3
TRISB2
WPUB2
TRISB1
WPUB1
TRISB0
WPUB0
WPUB
Legend:
Note 1:
2:
x= unknown, u= unchanged, -= unimplemented locations read as ‘0’. Shaded cells are not used by PORTB.
This register is only initialized by a POR or BOR reset and is unchanged by other Resets.
Configuration Word register bit DEBUG <12> is also associated with PORTB. See Register 16-1 for more details.
© 2007 Microchip Technology Inc.
DS41250F-page 61
MICROCHIP [ MICROCHIP ]
