PIC16F87/88
Pin RA4 is multiplexed with the Timer0 module clock
input and with analog input to become the RA4/AN4/
T0CKI/C2OUT pin. The RA4/AN4/T0CKI/C2OUT pin is
a Schmitt Trigger input and full CMOS output driver.
5.0
I/O PORTS
Some pins for these I/O ports are multiplexed with an
alternate function for the peripheral features on the
device. In general, when a peripheral is enabled, that
pin may not be used as a general purpose I/O pin.
Pin RA5 is multiplexed with the Master Clear module
input. The RA5/MCLR/VPP pin is a Schmitt Trigger
input.
Additional information on I/O ports may be found in the
PICmicro® Mid-Range Reference Manual (DS33023).
Pin RA6 is multiplexed with the oscillator module input
and external oscillator output. Pin RA7 is multiplexed
with the oscillator module input and external oscillator
input. Pin RA6/OSC2/CLKO and pin RA7/OSC1/CLKI
are Schmitt Trigger inputs and full CMOS output drivers.
5.1
PORTA and the TRISA Register
PORTA is a 8-bit wide, bidirectional port. The corre-
sponding data direction register is TRISA. Setting a
TRISA bit (= 1) will make the corresponding PORTA
pin an input (i.e., put the corresponding output driver in
a high-impedance mode). Clearing a TRISA bit (= 0)
will make the corresponding PORTA pin an output (i.e.,
put the contents of the output latch on the selected pin).
Pins RA<1:0> are multiplexed with analog inputs. Pins
RA<3:2> are multiplexed with analog inputs, compara-
tor outputs, and VREF inputs. Pins RA<3:0> have TTL
inputs and full CMOS output drivers.
EXAMPLE 5-1:
INITIALIZING PORTA
Note:
On
a
Power-on Reset, the pins
BANKSEL PORTA
; select bank of PORTA
; Initialize PORTA by
; clearing output
PORTA<4:0> are configured as analog
inputs and read as ‘0’.
CLRF
PORTA
Reading the PORTA register, reads the status of the
pins, whereas writing to it, will write to the port latch. All
write operations are read-modify-write operations.
Therefore, a write to a port implies that the port pins are
read, this value is modified, and then written to the port
data latch.
; data latches
BANKSEL ANSEL
; Select Bank of ANSEL
; Configure all pins
; as digital inputs
MOVLW
MOVWF
0x00
ANSEL
MOVLW
MOVWF
0xFF
; Value used to
; initialize data
; direction
TRISA
; Set RA<7:0> as inputs
TABLE 5-1:
PORTA FUNCTIONS
Name
Bit#
Buffer
Function
RA0/AN0
bit 0
bit 1
TTL
TTL
Input/output or analog input.
Input/output or analog input.
RA1/AN1
RA2/AN2/CVREF/VREF-(2)
Input/output or analog input or VREF- or comparator VREF
output.
bit 2
TTL
RA3/AN3/VREF+(2)/C1OUT
RA4/AN4(2)/T0CKI/C2OUT
bit 3
bit 4
TTL
ST
Input/output or analog input or VREF+ or comparator output.
Input/output, analog input or TMR0 external input or
comparator output.
RA5/MCLR/VPP
bit 5
bit 6
ST
ST
Input, Master Clear (Reset) or programming voltage input.
RA6/OSC2/CLKO
Input/output, connects to crystal or resonator, oscillator
output or 1/4 the frequency of OSC1, and denotes the
instruction cycle in RC mode.
RA7/OSC1/CLKI
bit 7 ST/CMOS(1) Input/output, connects to crystal or resonator or oscillator
input.
Legend: TTL = TTL input, ST = Schmitt Trigger input
Note 1: This buffer is a Schmitt Trigger input when configured in RC Oscillator mode and a CMOS input otherwise.
2: PIC16F88 only.
2003 Microchip Technology Inc.
Preliminary
DS30487B-page 51
MICROCHIP [ MICROCHIP ]
