PIC16F882/883/884/886/887
3.2.3.8
RA7/OSC1/CLKIN
Figure 3-8 shows the diagram for this pin. This pin is
configurable to function as one of the following:
• a general purpose I/O
• a crystal/resonator connection
• a clock input
FIGURE 3-8:
BLOCK DIAGRAM OF RA7
Oscillator
Circuit
Data Bus
OSC1
VDD
D
Q
Q
WR
PORTA
CK
I/O Pin
D
Q
Q
WR
TRISA
CK
VSS
INTOSC
Mode
RD
TRISA
RD
PORTA
CLKIN
TABLE 3-1:
SUMMARY OF REGISTERS ASSOCIATED WITH PORTA
Value on
all other
Resets
Value on
POR, BOR
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
ADCON0
ANSEL
ADCS1
ANS7
ADCS0
ANS6
CHS3
ANS5
C1OE
C2OE
CHS2
ANS4
CHS1
ANS3
—
CHS0
ANS2
C1R
ADON
ANS0
0000 0000
1111 1111
0000 -000
0000 -000
0000 --10
--01 --qq
1111 1111
xxxx xxxx
0000 0000
1111 1111
0000 0000
1111 1111
0000 -000
0000 -000
0000 --10
--0u --uu
1111 1111
uuuu uuuu
0000 0000
1111 1111
GO/DONE
ANS1
CM1CON0
CM2CON0
CM2CON1
PCON
C1ON
C2ON
C1OUT
C2OUT
C1POL
C2POL
C2RSEL
C1CH1
C2CH1
T1GSS
POR
C1CH0
C2CH0
C2SYNC
BOR
—
C2R
MC1OUT MC2OUT C1RSEL
—
—
—
—
ULPWUE SBOREN
—
—
OPTION_REG
PORTA
RBPU
RA7
INTEDG
RA6
T0CS
RA5
T0SE
RA4
PSA
RA3
SSPM3
TRISA3
PS2
PS1
PS0
RA2
RA1
RA0
SSPCON
TRISA
WCOL
TRISA7
SSPOV
TRISA6
SSPEN
TRISA5
CKP
SSPM2
TRISA2
SSPM1
TRISA1
SSPM0
TRISA0
TRISA4
Legend:
x= unknown, u= unchanged, – = unimplemented locations read as ‘0’. Shaded cells are not used by PORTA.
DS41291D-page 46
Preliminary
© 2007 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
