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PIC16F886-I/SS 参数 Datasheet PDF下载

PIC16F886-I/SS图片预览
型号: PIC16F886-I/SS
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚,增强基于闪存的8位CMOS微控制器采用纳瓦技术 [28/40/44-Pin, Enhanced Flash-Based 8-Bit CMOS Microcontrollers with nanoWatt Technology]
分类和应用: 闪存微控制器和处理器外围集成电路光电二极管时钟
文件页数/大小: 288 页 / 5120 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC16F882/883/884/886/887  
11.6.6  
PROGRAMMABLE DEAD-BAND  
DELAY MODE  
FIGURE 11-16:  
EXAMPLE OF  
HALF-BRIDGE PWM  
OUTPUT  
In Half-Bridge applications where all power switches  
are modulated at the PWM frequency, the power  
switches normally require more time to turn off than to  
turn on. If both the upper and lower power switches are  
switched at the same time (one turned on, and the  
other turned off), both switches may be on for a short  
period of time until one switch completely turns off.  
Period  
Period  
Pulse Width  
(2)  
(2)  
P1A  
td  
td  
During this brief interval,  
a very high current  
P1B  
(shoot-through current) will flow through both power  
switches, shorting the bridge supply. To avoid this  
potentially destructive shoot-through current from  
flowing during switching, turning on either of the power  
switches is normally delayed to allow the other switch  
to completely turn off.  
(1)  
(1)  
(1)  
td = Dead-Band Delay  
Note 1: At this time, the TMR2 register is equal to the  
PR2 register.  
In Half-Bridge mode,  
a
digitally programmable  
2: Output signals are shown as active-high.  
dead-band delay is available to avoid shoot-through  
current from destroying the bridge power switches. The  
delay occurs at the signal transition from the non-active  
state to the active state. See Figure 11-16 for  
illustration. The lower seven bits of the associated  
PWM1CON register (Register 11-4) sets the delay  
period in terms of microcontroller instruction cycles  
(TCY or 4 TOSC).  
FIGURE 11-17:  
EXAMPLE OF HALF-BRIDGE APPLICATIONS  
V+  
Standard Half-Bridge Circuit (“Push-Pull”)  
FET  
Driver  
+
V
-
P1A  
Load  
FET  
Driver  
+
V
-
P1B  
V-  
© 2007 Microchip Technology Inc.  
Preliminary  
DS41291D-page 143  
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