PIC16F87/88
FIGURE 1-2:
PIC16F88 DEVICE BLOCK DIAGRAM
13
FLASH
Program
Memory
4K x 14
Program
Bus
8 Level Stack
(13-bit)
Program Counter
Data Bus
8
PORTA
RA0/AN0
RA1/AN1
RA2/AN2/CV
REF
/V
REF
-
RA3/AN3/V
REF
+/C1OUT
RA4/AN4/T0CKI/C2OUT
RA5/MCLR/V
PP
RA6/OSC2/CLKO
RA7/OSC1/CLKI
PORTB
Indirect
Addr
RB0/INT/CCP1
(2)
RB1/SDI/SDA
RB2/SDO/RX/DT
RB3/PGM/CCP1
(2)
RB4/SCK/SCL
RB5/SS/TX/CK
RB6/AN5/PGC/T1OSO/T1CKI
RB7/AN6/PGD/T1OSI
RAM
File
Registers
368 x 8
RAM Addr
(1)
9
14
Instruction reg
Direct Addr
7
Addr MUX
8
FSR reg
STATUS reg
8
3
Power-up
Timer
Instruction
Decode &
Control
Timing
Generation
OSC1/CLKI
OSC2/CLKO
Oscillator
Start-up Timer
Power-on
Reset
Watchdog
Timer
Brown-out
Reset
8
MUX
ALU
W reg
RA5/MCLR
V
DD
, V
SS
Timer2
Timer1
Timer0
10-bit A/D
SSP
USART
CCP1
Data EE
256 Bytes
Comparators
Note 1:
2:
Higher order bits are from the STATUS register.
The CCP1 pin is determined by CCPMX in Configuration Word 1 register.
2003 Microchip Technology Inc.
Preliminary
DS30487B-page 7
MICROCHIP [ MICROCHIP TECHNOLOGY ]
