PIC16F818/819
12.10.1 INT INTERRUPT
12.10.3 PORTB INTCON CHANGE
External interrupt on the RB0/INT pin is edge triggered,
either rising if bit INTEDG (OPTION_REG<6>) is set,
or falling if the INTEDG bit is clear. When a valid edge
appears on the RB0/INT pin, flag bit, INTF
(INTCON<1>), is set. This interrupt can be disabled by
clearing enable bit, INTE (INTCON<4>). Flag bit INTF
must be cleared in software in the Interrupt Service
Routine before re-enabling this interrupt. The INT inter-
rupt can wake-up the processor from Sleep if bit INTE
was set prior to going into Sleep. The status of Global
Interrupt Enable bit, GIE, decides whether or not the
processor branches to the interrupt vector following
wake-up. See Section 12.13 “Power-Down Mode
(Sleep)” for details on Sleep mode.
An input change on PORTB<7:4> sets flag bit, RBIF
(INTCON<0>). The interrupt can be enabled/disabled
by setting/clearing enable bit, RBIE (INTCON<3>). See
Section 3.2 “EECON1 and EECON2 Registers”.
12.11 Context Saving During Interrupts
During an interrupt, only the return PC value is saved
on the stack. Typically, users may wish to save key
registers during an interrupt (i.e., W, Status registers).
This will have to be implemented in software as shown
in Example 12-1.
For PIC16F818 devices, the upper 64 bytes of each
bank are common. Temporary holding registers,
W_TEMP and STATUS_TEMP, should be placed here.
These 64 locations do not require banking and
therefore, make it easier for context save and restore.
12.10.2 TMR0 INTERRUPT
An overflow (FFh → 00h) in the TMR0 register will set
flag bit, TMR0IF (INTCON<2>). The interrupt can be
enabled/disabled by setting/clearing enable bit,
TMR0IE (INTCON<5>) (see Section 6.0 “Timer0
Module”).
For PIC16F819 devices, the upper 16 bytes of each
bank are common.
EXAMPLE 12-1:
SAVING STATUS AND W REGISTERS IN RAM
MOVWF
SWAPF
CLRF
MOVWF
:
W_TEMP
STATUS, W
STATUS
;Copy W to TEMP register
;Swap status to be saved into W
;bank 0, regardless of current bank, Clears IRP,RP1,RP0
;Save status to bank zero STATUS_TEMP register
STATUS_TEMP
:(ISR)
:
;Insert user code here
SWAPF
STATUS_TEMP, W
;Swap STATUS_TEMP register into W
;(sets bank to original state)
;Move W into STATUS register
;Swap W_TEMP
MOVWF
SWAPF
SWAPF
STATUS
W_TEMP, F
W_TEMP, W
;Swap W_TEMP into W
2004 Microchip Technology Inc.
DS39598E-page 97
MICROCHIP [ MICROCHIP ]
