PIC16F818/819
TABLE 2-1:
SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Value on Detailson
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
POR, BOR
page:
Bank 1
80h(1)
81h
INDF
Addressing this location uses contents of FSR to address data memory (not a physical register)
0000 0000
1111 1111
0000 0000
23
17, 54
23
OPTION_REG RBPU
INTEDG
Program Counter’s (PC) Least Significant Byte
IRP RP1 RP0 TO
Indirect Data Memory Address Pointer
TRISA7 TRISA6
TRISA5(3) PORTA Data Direction Register (TRISA<4:0>
T0CS
T0SE
PSA
PS2
PS1
PS0
82h(1)
PCL
83h(1)
84h(1)
85h
STATUS
FSR
TRISA
TRISB
—
PD
Z
DC
C
0001 1xxx
xxxx xxxx
1111 1111
1111 1111
—
16
23
39
86h
PORTB Data Direction Register
Unimplemented
43
87h
—
88h
—
Unimplemented
—
—
89h
—
Unimplemented
—
—
8Ah(1,2) PCLATH
—
GIE
—
—
PEIE
ADIE
—
—
TMR0IE
—
Write Buffer for the upper 5 bits of the PC
---0 0000
0000 000x
-0-- 0000
---0 ----
---- --qq
-000 -0--
--00 0000
—
23
8Bh(1)
8Ch
8Dh
8Eh
8Fh
INTCON
PIE1
INTE
—
RBIE
SSPIE
—
TMR0IF
CCP1IE
—
INTF
TMR2IE
—
RBIF
TMR1IE
—
18
19
PIE2
—
—
EEIE
—
21
PCON
OSCCON
OSCTUNE
—
—
—
—
—
—
POR
—
BOR
—
22
—
IRCF2
—
IRCF1
TUN5
IRCF0
TUN4
—
IOFS
TUN2
38
90h(1)
—
TUN3
TUN1
TUN0
36
91h
Unimplemented
—
92h
PR2
Timer2 Period Register
Synchronous Serial Port (I2C™ mode) Address Register
1111 1111
0000 0000
68
93h
SSPADD
71, 76
94h
95h
96h
97h
98h
99h
9Ah
9Bh
9Ch
9Dh
9Eh
9Fh
SSPSTAT
SMP
CKE
D/A
P
S
R/W
UA
BF
0000 0000
72
—
—
—
—
—
—
—
—
—
81
82
—
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
ADRESL
ADCON1
A/D Result Register Low Byte
ADFM ADCS2
xxxx xxxx
00-- 0000
—
—
PCFG3
PCFG2
PCFG1
PCFG0
Legend: x= unknown, u= unchanged, q= value depends on condition, - = unimplemented, read as ‘0’, r= reserved.
Shaded locations are unimplemented, read as ‘0’.
Note 1:
2:
These registers can be addressed from any bank.
The upper byte of the program counter is not directly accessible. PCLATH is a holding register for the PC<12:8>, whose contents are
transferred to the upper byte of the program counter.
3:
Pin 5 is an input only; the state of the TRISA5 bit has no effect and will always read ‘1’.
DS39598E-page 14
2004 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
