PIC16F631/677/685/687/689/690
4.4.3.3
RB6/SCK/SCL
FIGURE 4-9:
BLOCK DIAGRAM OF RB6
Figure 4-9 shows the diagram for this pin. The
RB6/SCK/SCL(1) pin is configurable to function as one
of the following:
Data Bus
D
Q
Q
VDD
WR
WPUB
CK
Weak
• a general purpose I/O
• a SPI clock
• an I2C™ clock
RABPU
RD
WPUB
Note 1: SCK and SCL are available on
PIC16F677/PIC16F687/PIC16F689/
PIC16F690 only.
SSPEN
VDD
D
Q
Q
SSP
Clock
10
WR
PORTB
CK
01
I/O Pin
From
SSP
D
Q
Q
10
WR
TRISB
CK
VSS
01
RD
TRISB
RD
PORTB
D
Q
Q
Q
Q
D
CK
WR
IOCB
EN
Q3
RD
IOCB
D
ST
EN
Interrupt-on-
Change
RD PORTB
To SSPSR
Available on PIC16F677/PIC16F687/PIC16F689/PIC16F690
only.
© 2007 Microchip Technology Inc.
DS41262D-page 73