PIC16F631/677/685/687/689/690
EXAMPLE 9-1:
A/D CONVERSION
;This code block configures the ADC
;for polling, Vdd reference, Frc clock
;and AN0 input.
;
;Conversion start & polling for completion
; are included.
;
BANKSEL
MOVLW
MOVWF
BANKSEL
BSF
BANKSEL
BSF
BANKSEL
MOVLW
MOVWF
CALL
BSF
BTFSC
GOTO
BANKSEL
MOVF
MOVWF
BANKSEL
MOVF
ADCON1
;
B’01110000’ ;ADC Frc clock
ADCON1
TRISA
TRISA,0
ANSEL
ANSEL,0
ADCON0
B’10000001’ ;Right justify,
ADCON0
SampleTime
ADCON0,GO
ADCON0,GO
$-1
;
;
;Set RA0 to input
;
;Set RA0 to analog
;
; Vdd Vref, AN0, On
;Acquisiton delay
;Start conversion
;Is conversion done?
;No, test again
;
;Read upper 2 bits
;store in GPR space
;
ADRESH
ADRESH,W
RESULTHI
ADRESL
ADRESL,W
RESULTLO
;Read lower 8 bits
;Store in GPR space
MOVWF
9.2.7
ADC REGISTER DEFINITIONS
The following registers are used to control the
operation of the ADC.
DS41262D-page 112
© 2007 Microchip Technology Inc.