PIC16F631/677/685/687/689/690
Block Diagrams and pinout descriptions of the devices
are as follows:
1.0
DEVICE OVERVIEW
The PIC16F631/677/685/687/689/690 devices are
covered by this data sheet. They are available in 20-pin
PDIP, SOIC, TSSOP and QFN packages.
• PIC16F631 (Figure 1-1, Table 1-1)
• PIC16F677 (Figure 1-2, Table 1-2)
• PIC16F685 (Figure 1-3, Table 1-3)
• PIC16F687/PIC16F689 (Figure 1-4, Table 1-4)
• PIC16F690 (Figure 1-5, Table 1-5)
FIGURE 1-1:
PIC16F631 BLOCK DIAGRAM
INT
Configuration
13
8
PORTA
Data Bus
Program Counter
RA0
RA1
RA2
RA3
RA4
RA5
Flash
1K x 14
Program
Memory
RAM
64 bytes
File
8-Level Stack (13-bit)
Registers
Program
Bus
14
RAM Addr
PORTB
9
Addr MUX
Instruction Reg
RB4
Indirect
Addr
7
Direct Addr
8
RB5
RB6
RB7
FSR Reg
STATUS Reg
MUX
8
PORTC
RC0
RC1
RC2
RC3
RC4
RC5
RC6
RC7
3
Power-up
Timer
Instruction
Decode and
Control
Oscillator
Start-up Timer
ALU
OSC1/CLKI
OSC2/CLKO
Power-on
Reset
8
Timing
Generation
Watchdog
Timer
W Reg
Brown-out
Reset
Internal
Oscillator
Block
VDD
VSS
MCLR
C1IN- C1IN+ C1OUT C2IN- C2IN+ C2OUT
T0CKI
T1G T1CKI
ULPWU
EEDAT
128 Bytes
Data
EEPROM
2
Ultra Low-Power
Wake-up
Analog Comparators
and Reference
Timer0
Timer1
EEADR
8
© 2007 Microchip Technology Inc.
DS41262D-page 9