PIC16F631/677/685/687/689/690
4.2.5.2
RA1/AN1/C12IN0-/VREF/ICSPCLK
4.2.5.3
RA2/AN2/T0CKI/INT/C1OUT
Figure 4-2 shows the diagram for this pin. The
RA1/AN1/C12IN0-/VREF/ICSPCLK pin is configurable to
function as one of the following:
Figure 4-3 shows the diagram for this pin. The
RA2/AN2/T0CKI/INT/C1OUT pin is configurable to
function as one of the following:
• a general purpose I/O
• a general purpose I/O
• an analog input for the ADC (except PIC16F631)
• an analog input to Comparator C1 or C2
• a voltage reference input for the ADC
• In-Circuit Serial Programming clock
• an analog input for the ADC (except PIC16F631)
• the clock input for TMR0
• an external edge triggered interrupt
• a digital output from Comparator C1
FIGURE 4-2:
BLOCK DIAGRAM OF RA1
FIGURE 4-3:
BLOCK DIAGRAM OF RA2
Analog(1)
Input Mode
Analog(1)
Input Mode
Data Bus
D
Data Bus
D
Q
Q
VDD
Q
Q
VDD
WR
CK
WR
CK
Weak
Weak
WPUA
WPUA
RABPU
RD
WPUA
RABPU
RD
WPUA
C1OUT
Enable
VDD
VDD
D
Q
Q
D
Q
Q
WR
PORTA
WR
PORTA
CK
CK
C1OUT
1
0
I/O Pin
I/O Pin
D
Q
Q
D
Q
Q
WR
TRISA
WR
TRISA
CK
CK
VSS
VSS
Analog(1)
Analog(1)
Input Mode
Input Mode
RD
TRISA
RD
TRISA
RD
PORTA
RD
PORTA
D
Q
Q
D
Q
Q
Q
Q
D
Q
Q
D
CK
WR
CK
WR
IOCA
IOCA
EN
Q3
Q3
EN
RD
IOCA
RD
IOCA
D
D
EN
EN
Interrupt-on-
Change
Interrupt-on-
Change
RD PORTA
RD PORTA
To Comparator
To A/D Converter(2)
To TMR0
To INT
To A/D Converter(2)
Note 1: ANSEL determines Analog Input mode.
2: Not implemented on PIC16F631.
Note 1: ANSEL determines Analog Input mode.
2: Not implemented on PIC16F631.
© 2007 Microchip Technology Inc.
DS41262D-page 65