欢迎访问ic37.com |
会员登录 免费注册
发布采购

PIC16F722-I/SS 参数 Datasheet PDF下载

PIC16F722-I/SS图片预览
型号: PIC16F722-I/SS
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚闪存单片机采用纳瓦XLP技术 [28/40/44-Pin Flash Microcontrollers with nanoWatt XLP Technology]
分类和应用: 闪存微控制器
文件页数/大小: 302 页 / 4540 K
品牌: MICROCHIP [ MICROCHIP ]
 浏览型号PIC16F722-I/SS的Datasheet PDF文件第224页浏览型号PIC16F722-I/SS的Datasheet PDF文件第225页浏览型号PIC16F722-I/SS的Datasheet PDF文件第226页浏览型号PIC16F722-I/SS的Datasheet PDF文件第227页浏览型号PIC16F722-I/SS的Datasheet PDF文件第229页浏览型号PIC16F722-I/SS的Datasheet PDF文件第230页浏览型号PIC16F722-I/SS的Datasheet PDF文件第231页浏览型号PIC16F722-I/SS的Datasheet PDF文件第232页  
PIC16F72X/PIC16LF72X  
TABLE 23-4: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER, POWER-UP TIMER,  
AND BROWN-OUT RESET PARAMETERS  
Standard Operating Conditions (unless otherwise stated)  
Operating Temperature -40°C TA +125°C  
Param  
No.  
Sym.  
TMCL  
Characteristic  
Min. Typ† Max. Units  
Conditions  
30  
MCLR Pulse Width (low)  
2
5
μs VDD = 3.3-5V, -40°C to +85°C  
μs VDD = 3.3-5V  
31  
32  
TWDTLP Low Power Watchdog Timer Time-  
out Period (No Prescaler)  
10  
18  
27  
ms VDD = 3.3V-5V  
TOST  
Oscillator Start-up Timer Period(1),  
1024  
Tosc (Note 3)  
(2)  
33*  
34*  
TPWRT Power-up Timer Period, PWRTE = 0 40  
65  
140  
2.0  
ms  
TIOZ  
I/O high-impedance from MCLR Low  
or Watchdog Timer Reset  
μs  
35  
VBOR  
VHYST  
Brown-out Reset Voltage  
2.38  
1.80  
2.5  
1.9  
2.73  
2.11  
V
BORV=2.5V  
BORV=1.9V  
36*  
37*  
Brown-out Reset Hysteresis  
0
1
25  
3
50  
mV -40°C to +85°C  
TBORDC Brown-out Reset DC Response  
Time  
5
10  
μs VDD VBOR, -40°C to +85°C  
VDD VBOR  
*
These parameters are characterized but not tested.  
Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance  
only and are not tested.  
Note 1: Instruction cycle period (TCY) equals four times the input oscillator time base period. All specified values are  
based on characterization data for that particular oscillator type under standard operating conditions with the  
device executing code. Exceeding these specified limits may result in an unstable oscillator operation and/or  
higher than expected current consumption. All devices are tested to operate at “min” values with an external  
clock applied to the OSC1 pin. When an external clock input is used, the “max” cycle time limit is “DC” (no  
clock) for all devices.  
2: By design.  
3: Period of the slower clock.  
4: To ensure these voltage tolerances, VDD and VSS must be capacitively decoupled as close to the device as  
possible. 0.1 μF and 0.01 μF values in parallel are recommended.  
DS41341E-page 228  
© 2009 Microchip Technology Inc.