PIC16F72X/PIC16LF72X
FIGURE 1-2:
PIC16F724/727/PIC16LF724/727 BLOCK DIAGRAM
Configuration
13
Program Counter
Flash
Program
Memory
Data Bus
8
PORTA
RA0
RA1
RA2
RA3
RA4
RA5
RA6
RA7
PORTB
RB0
RB1
RB2
RB3
RB4
RB5
RB6
RB7
PORTC
RC0
RC1
RC2
RC3
RC4
RC5
RC6
RC7
PORTD
W Reg
RD0
RD1
RD2
RD3
RD4
RD5
RD6
RD7
PORTE
RE0
MCLR V
DD
T1OSI
T1OSO
T0CKI
V
SS
CCP2
CCP2
RE1
RE2
RE3
8 Level Stack
(13-bit)
RAM
Program
Bus
14
Instruction Reg
Instruction reg
Direct Addr
7
RAM Addr
9
Addr MUX
8
Indirect
Addr
FSR Reg
FSR reg
STATUS Reg
STATUS reg
8
3
Power-up
Timer
Instruction
Decode and
Decode &
Control
OSC1/CLKIN
OSC2/CLKOUT
Timing
Generation
Oscillator
Start-up Timer
Power-on
Reset
Watchdog
Timer
Brown-out
Reset
LDO
(1)
Regulator
8
MUX
ALU
Internal
Oscillator
Block
CCP1
CCP1
Timer1
32 kHz
Oscillator
TX/CK RX/DT
T1G
T1CKI
SDI/ SCK/
SDO SDA SCL SS
Timer0
V
REF
Timer1
Timer2
AUSART
Synchronous
Serial Port
Analog-To-Digital Converter
AN0 AN1 AN2 AN3 AN4 AN5 AN6 AN7 AN8 AN9 AN10 AN11 AN12 AN13
Capacitive Sensing Module
CPS0 CPS1 CPS2 CPS3 CPS4 CPS5 CPS6 CPS7 CPS8 CPS9 CPS10 CPS11 CPS12 CPS13 CPS14 CPS15
Note
1:
PIC16F724/727 only.
©
2009 Microchip Technology Inc.
DS41341E-page 15
MICROCHIP [ MICROCHIP TECHNOLOGY ]
