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PIC16F688-I/ST 参数 Datasheet PDF下载

PIC16F688-I/ST图片预览
型号: PIC16F688-I/ST
PDF下载: 下载PDF文件 查看货源
内容描述: 14引脚基于闪存的8位CMOS微控制器采用纳瓦技术 [14-Pin Flash-Based, 8-Bit CMOS Microcontrollers with nanoWatt Technology]
分类和应用: 闪存微控制器
文件页数/大小: 202 页 / 3832 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC16F688  
The first (preferred) method uses the OSCTUNE  
register to adjust the INTOSC output. Adjusting the  
value in the OSCTUNE register allows for fine resolution  
changes to the system clock source. See Section 3.5  
“Internal Clock Modes” for more information.  
10.2 Clock Accuracy with  
Asynchronous Operation  
The factory calibrates the internal oscillator block out-  
put (INTOSC). However, the INTOSC frequency may  
drift as VDD or temperature changes, and this directly  
affects the asynchronous baud rate. Two methods may  
be used to adjust the baud rate clock, but both require  
a reference clock source of some kind.  
The other method adjusts the value in the Baud Rate  
Generator. This can be done automatically with the  
Auto-Baud Detect feature (see Section 10.3.1 “Auto-  
Baud Detect”). There may not be fine enough  
resolution when adjusting the Baud Rate Generator to  
compensate for a gradual change in the peripheral  
clock frequency.  
REGISTER 10-1: TXSTA: TRANSMIT STATUS AND CONTROL REGISTER  
R/W-0  
CSRC  
R/W-0  
TX9  
R/W-0  
R/W-0  
SYNC  
R/W-0  
R/W-0  
BRGH  
R-1  
R/W-0  
TX9D  
(1)  
TXEN  
SENDB  
TRMT  
bit 7  
bit 0  
Legend:  
R = Readable bit  
-n = Value at POR  
W = Writable bit  
‘1’ = Bit is set  
U = Unimplemented bit, read as ‘0’  
‘0’ = Bit is cleared x = Bit is unknown  
bit 7  
CSRC: Clock Source Select bit  
Asynchronous mode:  
Don’t care  
Synchronous mode:  
1= Master mode (clock generated internally from BRG)  
0= Slave mode (clock from external source)  
bit 6  
bit 5  
bit 4  
bit 3  
TX9: 9-bit Transmit Enable bit  
1= Selects 9-bit transmission  
0= Selects 8-bit transmission  
(1)  
TXEN: Transmit Enable bit  
1= Transmit enabled  
0= Transmit disabled  
SYNC: EUSART Mode Select bit  
1= Synchronous mode  
0= Asynchronous mode  
SENDB: Send Break Character bit  
Asynchronous mode:  
1= Send Sync Break on next transmission (cleared by hardware upon completion)  
0= Sync Break transmission completed  
Synchronous mode:  
Don’t care  
bit 2  
BRGH: High Baud Rate Select bit  
Asynchronous mode:  
1= High speed  
0= Low speed  
Synchronous mode:  
Unused in this mode  
bit 1  
bit 0  
TRMT: Transmit Shift Register Status bit  
1= TSR empty  
0= TSR full  
TX9D: Ninth bit of Transmit Data  
Can be address/data bit or a parity bit.  
Note 1: SREN/CREN overrides TXEN in Sync mode.  
DS41203D-page 92  
© 2007 Microchip Technology Inc.  
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