PIC16F688
FIGURE 9-1:
FLASH PROGRAM MEMORY READ CYCLE EXECUTION
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
PC
PC + 1
EEADRH,EEADR
PC + 3
PC+3
PC + 4
PC + 5
Flash ADDR
Flash Data
INSTR (PC)
INSTR (PC + 1)
EEDATH,EEDAT
INSTR (PC + 3)
INSTR (PC + 4)
BSF EECON1,RD
executed here
INSTR(PC - 1)
executed here
INSTR(PC + 1)
executed here
Forced NOP
executed here
INSTR(PC + 3)
executed here
INSTR(PC + 4)
executed here
RD bit
EEDATH
EEDAT
Register
EERHLT
TABLE 9-1:
SUMMARY OF REGISTERS ASSOCIATED WITH DATA EEPROM
Value on
all other
Resets
Value on
POR, BOR
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
EECON1
EECON2
EEADR
EEADRH
EEDAT
EEPGD
—
—
—
WRERR
WREN
WR
RD
x--- x000
---- ----
0000 0000
---- 0000
0000 0000
--00 0000
0000 000x
0000 0000
0--- q000
---- ----
0000 0000
---- 0000
0000 0000
--00 0000
0000 000x
0000 0000
EEPROM Control Register 2 (not a physical register)
EEADR7 EEADR6 EEADR5
EEADR4
—
EEADR3
EEADR2
EEADR1
EEADR0
—
EEDAT7
—
—
EEDAT6
—
—
EEADRH3 EEADRH2 EEADRH1 EEADRH0
EEDAT3 EEDAT2 EEDAT1 EEDAT0
EEDAT5
EEDAT4
EEDATH
INTCON
PIE1
EEDATH5 EEDATH4 EEDATH3 EEDATH2 EEDATH1 EEDATH0
GIE
PEIE
ADIE
ADIF
T0IE
RCIE
RCIF
INTE
C2IE
C2IF
RABIE
C1IE
C1IF
T0IF
INTF
TXIE
TXIF
RABIF
EEIE
EEIF
OSFIE
OSFIF
TMR1IE
TMR1IF
PIR1
0000 0000
0000 0000
Legend:
x= unknown, u= unchanged, —= unimplemented read as ‘0’, q= value depends upon condition.
Shaded cells are not used by data EEPROM module.
DS41203D-page 82
© 2007 Microchip Technology Inc.