PIC16F688
TABLE 8-2:
SUMMARY OF ASSOCIATED ADC REGISTERS
Value on
Value on
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
all other
POR, BOR
Resets
ADCON0
ADCON1
ANSEL
ADFM
—
VCFG
ADCS2
ANS6
—
CHS2
ADCS0
ANS4
CHS1
—
CHS0
—
GO/DONE ADON
00-0 0000 00-0 0000
-000 ---- -000 ----
1111 1111 1111 1111
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
0000 000x 0000 000x
ADCS1
ANS5
—
—
ANS7
ANS3
ANS2
ANS1
ANS0
ADRESH A/D Result Register High Byte
ADRESL A/D Result Register Low Byte
INTCON
PIE1
GIE
EEIE
EEIF
—
PEIE
ADIE
ADIF
—
T0IE
RCIE
RCIF
RA5
INTE
C2IE
C2IF
RA4
RC4
RAIE
C1IE
C1IF
RA3
T0IF
OSFIE
OSFIF
RA2
INTF
TXIE
RAIF
TMR1IE 0000 0000 0000 0000
TMR1IF 0000 0000 0000 0000
PIR1
TXIF
PORTA
PORTC
TRISA
TRISC
Legend:
RA1
RA0
RC0
--x0 x000 --x0 x000
--xx 0000 --xx 0000
—
—
RC5
RC3
RC2
RC1
—
—
TRISA5 TRISA4 TRISA3 TRISA2
TRISC5 TRISC4 TRISC3 TRISC2
TRISA1
TRISC1
TRISA0 --11 1111 --11 1111
TRISC0 --11 1111 --11 1111
—
—
x= unknown, u= unchanged, —= unimplemented read as ‘0’. Shaded cells are not used for ADC module.
© 2007 Microchip Technology Inc.
DS41203D-page 75