PIC16F688
FIGURE 7-8:
COMPARATOR VOLTAGE REFERENCE BLOCK DIAGRAM
16 Stages
8R
R
R
R
R
VDD
VRR
8R
16-1 Analog
MUX
VREN
15
14
CVREF to
Comparator
Input
2
1
0
(1)
VR<3:0>
VREN
VR<3:0> = 0000
VRR
Note 1: Care should be taken to ensure VREF remains
within the comparator common mode input
range. See Section 14.0 “Electrical Specifica-
tions” for more detail.
TABLE 7-2:
SUMMARY OF REGISTERS ASSOCIATED WITH THE COMPARATOR AND VOLTAGE
REFERENCE MODULES
Value on
Value on
POR, BOR
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
all other
Resets
ANSEL
CMCON0
CMCON1
INTCON
PIE1
ANS7
C2OUT
—
ANS6
C1OUT
—
ANS5
C2INV
—
ANS4
C1INV
—
ANS3
CIS
ANS2
CM2
—
ANS1
CM1
ANS0
CM0
1111 1111 1111 1111
0000 0000 0000 0000
---- --10 ---- --10
0000 000x 0000 000x
0000 0000 0000 0000
0000 0000 0000 0000
--x0 x000 --x0 x000
--xx 0000 --xx 0000
--11 1111 --11 1111
--11 1111 --11 1111
0-0- 0000 0-0- 0000
—
T1GSS
INTF
TXIE
TXIF
RA1
C2SYNC
RAIF
GIE
EEIE
EEIF
—
PEIE
ADIE
ADIF
—
T0IE
RCIE
RCIF
RA5
INTE
C2IE
C2IF
RA4
RAIE
C1IE
C1IF
RA3
RC3
T0IF
OSFIE
OSFIF
RA2
TMR1IE
TMR1IF
RA0
PIR1
PORTA
PORTC
TRISA
—
—
RC5
RC4
RC2
RC1
RC0
—
—
TRISA5 TRISA4 TRISA3 TRISA2 TRISA1
TRISC5 TRISC4 TRISC3 TRISC2 TRISC1
TRISA0
TRISC0
VR0
TRISC
—
—
VRCON
VREN
—
VRR
—
VR3
VR2
VR1
Legend:
x= unknown, u= unchanged, – = unimplemented, read as ‘0’. Shaded cells are not used for comparator.
DS41203D-page 64
© 2007 Microchip Technology Inc.