PIC16F688
2.2.2.6
PCON Register
The Power Control (PCON) register (see Register 2-6)
contains flag bits to differentiate between a:
• Power-on Reset (POR)
• Brown-out Reset (BOR)
• Watchdog Timer Reset (WDT)
• External MCLR Reset
The PCON register also controls the Ultra Low-Power
Wake-up and software enable of the BOR.
REGISTER 2-6:
PCON: POWER CONTROL REGISTER
U-0
—
U-0
—
R/W-0
R/W-1
SBOREN(1)
U-0
—
U-0
—
R/W-0
POR
R/W-x
BOR
ULPWUE
bit 7
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
bit 7-6
bit 5
Unimplemented: Read as ‘0’
ULPWUE: Ultra Low-Power Wake-up Enable bit
1= Ultra low-power wake-up enabled
0= Ultra low-power wake-up disabled
bit 4
SBOREN: Software BOR Enable bit(1)
1= BOR enabled
0= BOR disabled
bit 3-2
bit 1
Unimplemented: Read as ‘0’
POR: Power-on Reset Status bit
1= No Power-on Reset occurred
0= A Power-on Reset occurred (must be set in software after a Power-on Reset occurs)
bit 0
BOR: Brown-out Reset Status bit
1= No Brown-out Reset occurred
0= A Brown-out Reset occurred (must be set in software after a Brown-out Reset occurs)
Note 1: BOREN<1:0> = 01in the Configuration Word register for this bit to control the BOR.
DS41203D-page 18
© 2007 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
