PIC16F631/677/685/687/689/690
6.1
Timer1 Operation
6.0
TIMER1 MODULE WITH GATE
CONTROL
The Timer1 module is a 16-bit incrementing counter
which is accessed through the TMR1H:TMR1L register
pair. Writes to TMR1H or TMR1L directly update the
counter.
The Timer1 module is a 16-bit timer/counter with the
following features:
• 16-bit timer/counter register pair (TMR1H:TMR1L)
• Programmable internal or external clock source
• 3-bit prescaler
When used with an internal clock source, the module is
a timer. When used with an external clock source, the
module can be used as either a timer or counter.
• Optional LP oscillator
• Synchronous or asynchronous operation
6.2
Clock Source Selection
• Timer1 gate (count enable) via comparator or
T1G pin
The TMR1CS bit of the T1CON register is used to select
the clock source. When TMR1CS = 0, the clock source
is FOSC/4. When TMR1CS = 1, the clock source is
supplied externally.
• Interrupt on overflow
• Wake-up on overflow (external clock,
Asynchronous mode only)
• Time base for the Capture/Compare function
(PIC16F685/PIC16F690 only)
Clock
Source
FOSC
Mode
T1OSCEN
TMR1CS
• Special Event Trigger (with ECCP)
(PIC16F685/PIC16F690 only)
FOSC/4
x
0
1
xxx
xxx
0
1
1
• Comparator output synchronization to Timer1
clock
T1CKI pin
T1LPOSC
LP or
INTOSCIO
Figure 6-1 is a block diagram of the Timer1 module.
FIGURE 6-1:
TIMER1 BLOCK DIAGRAM
TMR1GE
T1GINV
TMR1ON
Set flag bit
To C2 Comparator module
Timer1 Clock
TMR1IF on
Overflow
(1)
TMR1
TMR1H
Synchronized
clock input
0
EN
*
TMR1L
1
Oscillator
T1SYNC
OSC1/T1CKI
1
Synchronize
det (2)
Prescaler
1, 2, 4, 8
FOSC/4
Internal
Clock
0
OSC2/T1G
2
T1CKPS<1:0>
TMR1CS
1
0
T1OSCEN
SYNCC2OUT
FOSC = 100
FOSC = 000
T1GSS
Sleep
*
ST Buffer is low power type when using LP osc, or high speed type when using T1CKI.
Note 1: Timer1 register increments on rising edge.
2: Synchronize does not operate while in Sleep.
DS41262D-page 84
© 2007 Microchip Technology Inc.
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