PIC16F631/677/685/687/689/690
4.4.3.4
RB7/TX/CK
FIGURE 4-10:
BLOCK DIAGRAM OF RB7
Figure 4-10 shows the diagram for this pin. The
RB7/TX/CK(1) pin is configurable to function as one of
the following:
Data Bus
D
Q
VDD
WR
WPUB
CK
Weak
Q
• a general purpose I/O
• an asynchronous serial output
• a synchronous clock I/O
RABPU
RD
WPUB
SPEN
TXEN
Note 1: TX and CK are available on
PIC16F687/PIC16F689/PIC16F690 only.
SYNC
EUSART
CK
10
EUSART
TX
D
Q
Q
0
VDD
WR
PORTB
CK
10
01
I/O Pin
D
Q
Q
WR
‘1’
01
CK
TRISB
VSS
01
RD
TRISB
RD
PORTB
D
Q
Q
Q
D
CK
WR
IOCB
EN
Q3
RD
IOCB
Q
D
EN
Interrupt-on-
Change
RD PORTB
Available on PIC16F687/PIC16F689/PIC16F690 only.
DS41262D-page 74
© 2007 Microchip Technology Inc.