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PIC16F687-I/ML 参数 Datasheet PDF下载

PIC16F687-I/ML图片预览
型号: PIC16F687-I/ML
PDF下载: 下载PDF文件 查看货源
内容描述: 20引脚基于闪存的8位CMOS微控制器采用纳瓦技术 [20-Pin Flash-Based, 8-Bit CMOS Microcontrollers with nanoWatt Technology]
分类和应用: 闪存微控制器和处理器外围集成电路时钟
文件页数/大小: 294 页 / 5272 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC16F631/677/685/687/689/690  
port pins are read, this value is modified and then  
written to the PORT data latch. RA3 reads ‘0’ when  
4.0  
I/O PORTS  
There are as many as eighteen general purpose I/O  
pins available. Depending on which peripherals are  
enabled, some or all of the pins may not be available as  
general purpose I/O. In general, when a peripheral is  
enabled, the associated pin may not be used as a  
general purpose I/O pin.  
MCLRE = 1.  
The TRISA register controls the PORTA pin output  
drivers, even when they are being used as analog  
inputs. The user should ensure the bits in the TRISA  
register are maintained set when using them as analog  
inputs. I/O pins configured as analog input always read  
0’.  
4.1  
PORTA and the TRISA Registers  
Note:  
The ANSEL register must be initialized to  
configure an analog channel as a digital  
input. Pins configured as analog inputs will  
read ‘0’.  
PORTA is  
a 6-bit wide, bidirectional port. The  
corresponding data direction register is TRISA  
(Register 4-2). Setting a TRISA bit (= 1) will make the  
corresponding PORTA pin an input (i.e., disable the  
output driver). Clearing a TRISA bit (= 0) will make the  
corresponding PORTA pin an output (i.e., enables  
output driver and puts the contents of the output latch  
on the selected pin). The exception is RA3, which is  
input only and its TRIS bit will always read as ‘1’.  
Example 4-1 shows how to initialize PORTA.  
EXAMPLE 4-1:  
INITIALIZING PORTA  
BCF  
BCF  
STATUS,RP0 ;Bank 0  
STATUS,RP1  
;
CLRF PORTA  
;Init PORTA  
BSF  
STATUS,RP1 ;Bank 2  
CLRF ANSEL  
;digital I/O  
BSF  
BCF  
STATUS,RP0 ;Bank 1  
STATUS,RP1  
Reading the PORTA register (Register 4-1) reads the  
status of the pins, whereas writing to it will write to the  
PORT latch. All write operations are read-modify-write  
operations. Therefore, a write to a port implies that the  
;
MOVLW 0Ch  
MOVWF TRISA  
;Set RA<3:2> as inputs  
;and set RA<5:4,1:0>  
;as outputs  
BCF  
STATUS,RP0 ;Bank 0  
REGISTER 4-1:  
PORTA: PORTA REGISTER  
U-0  
U-0  
R/W-x  
RA5  
R/W-x  
RA4  
R-x  
R/W-x  
RA2  
R/W-x  
RA1  
R/W-x  
RA3  
RA0  
bit 7  
bit 0  
Legend:  
R = Readable bit  
-n = Value at POR  
W = Writable bit  
‘1’ = Bit is set  
U = Unimplemented bit, read as ‘0’  
‘0’ = Bit is cleared  
x = Bit is unknown  
bit 7-6  
bit 5-0  
Unimplemented: Read as ‘0’  
RA<5:0>: PORTA I/O Pin bit  
1= Port pin is > VIH  
0= Port pin is < VIL  
REGISTER 4-2:  
TRISA: PORTA TRI-STATE REGISTER  
U-0  
U-0  
R/W-1  
R/W-1  
R-1  
R/W-1  
R/W-1  
R/W-1  
TRISA5  
TRISA4  
TRISA3  
TRISA2  
TRISA1  
TRISA0  
bit 0  
bit 7  
Legend:  
R = Readable bit  
-n = Value at POR  
W = Writable bit  
‘1’ = Bit is set  
U = Unimplemented bit, read as ‘0’  
‘0’ = Bit is cleared x = Bit is unknown  
bit 7-6  
bit 5-0  
Unimplemented: Read as ‘0’  
TRISA<5:0>: PORTA Tri-State Control bit  
1= PORTA pin configured as an input (tri-stated)  
0= PORTA pin configured as an output  
Note 1: TRISA<3> always reads ‘1’.  
2: TRISA<5:4> always reads ‘1’ in XT, HS and LP Oscillator modes.  
© 2007 Microchip Technology Inc.  
DS41262D-page 59  
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