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PIC16F687-I/ML 参数 Datasheet PDF下载

PIC16F687-I/ML图片预览
型号: PIC16F687-I/ML
PDF下载: 下载PDF文件 查看货源
内容描述: 20引脚基于闪存的8位CMOS微控制器采用纳瓦技术 [20-Pin Flash-Based, 8-Bit CMOS Microcontrollers with nanoWatt Technology]
分类和应用: 闪存微控制器和处理器外围集成电路时钟
文件页数/大小: 294 页 / 5272 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC16F631/677/685/687/689/690  
Baud Rate Error, Calculating ............................ 161  
GOTO....................................................................... 217  
INCF ......................................................................... 217  
INCFSZ..................................................................... 217  
IORLW...................................................................... 217  
IORWF...................................................................... 217  
MOVF ....................................................................... 218  
MOVLW.................................................................... 218  
MOVWF.................................................................... 218  
NOP.......................................................................... 218  
RETFIE..................................................................... 219  
RETLW..................................................................... 219  
RETURN................................................................... 219  
RLF........................................................................... 220  
RRF .......................................................................... 220  
SLEEP...................................................................... 220  
SUBLW..................................................................... 220  
SUBWF..................................................................... 221  
SWAPF..................................................................... 221  
XORLW .................................................................... 221  
XORWF .................................................................... 221  
Summary Table ........................................................ 214  
INTCON Register................................................................ 38  
Baud Rates, Asynchronous Modes .................. 162  
Formulas........................................................... 161  
High Baud Rate Select (BRGH Bit) .................. 161  
Synchronous Master Mode....................................... 169  
Associated Registers  
Receive..................................................... 172  
Transmit.................................................... 170  
Reception.......................................................... 171  
Requirements, Synchronous Receive .............. 246  
Requirements, Synchronous Transmission ...... 246  
Timing Diagram, Synchronous Receive ........... 246  
Timing Diagram, Synchronous Transmission ... 246  
Transmission .................................................... 169  
Synchronous Slave Mode......................................... 173  
Associated Registers  
Receive..................................................... 174  
Transmit.................................................... 173  
Reception.......................................................... 174  
Transmission .................................................... 173  
F
2
2
Fail-Safe Clock Monitor....................................................... 57  
Fail-Safe Condition Clearing....................................... 57  
Fail-Safe Detection ..................................................... 57  
Fail-Safe Operation..................................................... 57  
Reset or Wake-up from Sleep..................................... 57  
Firmware Instructions........................................................ 213  
Flash Program Memory .................................................... 119  
Fuses. See Configuration Bits  
Inter-Integrated Circuit (I C). See I C Mode  
Internal Oscillator Block  
INTOSC  
Specifications ................................................... 239  
Internal Sampling Switch (RSS) Impedance ..................... 116  
Internet Address ............................................................... 289  
Interrupts .......................................................................... 204  
ADC.......................................................................... 111  
Associated Registers................................................ 206  
Context Saving ......................................................... 207  
Interrupt-on-Change ................................................... 60  
Interrupt-on-change.................................................... 69  
PORTA/PORTB Interrupt-on-Change ...................... 205  
RA2/INT.................................................................... 204  
TMR0........................................................................ 205  
TMR1.......................................................................... 86  
INTOSC Specifications..................................................... 239  
IOCA Register..................................................................... 62  
IOCB Register..................................................................... 70  
G
General Purpose Register File............................................ 26  
I
2
I C Mode  
Addressing................................................................ 185  
Associated Registers ................................................ 192  
Master Mode............................................................. 191  
Mode Selection ......................................................... 184  
Multi-Master Mode .................................................... 191  
Operation .................................................................. 184  
Reception.................................................................. 186  
Slave Mode  
L
Load Conditions................................................................ 237  
SCL and SDA pins............................................ 184  
Transmission............................................................. 189  
ID Locations...................................................................... 211  
In-Circuit Serial Programming (ICSP)............................... 211  
Indirect Addressing, INDF and FSR registers..................... 44  
Instruction Format............................................................. 213  
Instruction Set................................................................... 213  
ADDLW..................................................................... 215  
ADDWF..................................................................... 215  
ANDLW..................................................................... 215  
ANDWF..................................................................... 215  
BCF........................................................................... 215  
BSF........................................................................... 215  
BTFSC ...................................................................... 215  
BTFSS ...................................................................... 216  
CALL......................................................................... 216  
CLRF......................................................................... 216  
CLRW ....................................................................... 216  
CLRWDT................................................................... 216  
COMF ....................................................................... 216  
DECF ........................................................................ 216  
DECFSZ.................................................................... 217  
M
MCLR ............................................................................... 197  
Internal...................................................................... 197  
Memory Organization ......................................................... 25  
Data............................................................................ 26  
Program...................................................................... 25  
Microchip Internet Web Site.............................................. 289  
Migrating from other PIC Devices..................................... 281  
MPLAB ASM30 Assembler, Linker, Librarian................... 224  
MPLAB ICD 2 In-Circuit Debugger ................................... 225  
MPLAB ICE 2000 High-Performance Universal  
In-Circuit Emulator.................................................... 225  
MPLAB ICE 4000 High-Performance Universal  
In-Circuit Emulator.................................................... 225  
MPLAB Integrated Development Environment Software.. 223  
MPLAB PM3 Device Programmer .................................... 225  
MPLINK Object Linker/MPLIB Object Librarian................ 224  
© 2007 Microchip Technology Inc.  
DS41262D-page 285  
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