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PIC16F687-I/ML 参数 Datasheet PDF下载

PIC16F687-I/ML图片预览
型号: PIC16F687-I/ML
PDF下载: 下载PDF文件 查看货源
内容描述: 20引脚基于闪存的8位CMOS微控制器采用纳瓦技术 [20-Pin Flash-Based, 8-Bit CMOS Microcontrollers with nanoWatt Technology]
分类和应用: 闪存微控制器和处理器外围集成电路时钟
文件页数/大小: 294 页 / 5272 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC16F631/677/685/687/689/690  
FIGURE 17-5:  
CLKOUT AND I/O TIMING  
Cycle  
Write  
Q4  
Fetch  
Q1  
Read  
Q2  
Execute  
Q3  
FOSC  
OS12  
OS11  
OS20  
OS21  
CLKOUT  
OS19  
OS13  
OS18  
OS16  
OS17  
I/O pin  
(Input)  
OS14  
OS15  
I/O pin  
(Output)  
New Value  
Old Value  
OS18, OS19  
TABLE 17-3: CLKOUT AND I/O TIMING PARAMETERS  
Standard Operating Conditions (unless otherwise stated)  
Operating Temperature -40°C TA +125°C  
Param  
No.  
Sym  
Characteristic  
Min  
Typ† Max Units  
Conditions  
OS11  
OS12  
OS13  
OS14  
OS15  
OS16  
TOSH2CKL FOSCto CLKOUT(1)  
TOSH2CKH FOSCto CLKOUT(1)  
70  
72  
20  
ns VDD = 5.0V  
ns VDD = 5.0V  
ns  
50  
TCKL2IOV  
CLKOUTto port out valid(1)  
TIOV2CKH Port input valid before CLKOUT(1)  
TOSC + 200 ns  
ns  
TOSH2IOV FOSC(Q1 cycle) to port out valid  
70*  
ns VDD = 5.0V  
ns VDD = 5.0V  
TOSH2IOI  
FOSC(Q2 cycle) to port input invalid  
(I/O in hold time)  
50  
OS17  
OS18  
OS19  
TIOV2OSH Port input valid to FOSC(Q2 cycle)  
20  
ns  
(I/O in setup time)  
TIOR  
TIOF  
Port output rise time(2)  
15  
40  
72  
32  
ns VDD = 2.0V  
VDD = 5.0V  
Port output fall time(2)  
28  
15  
55  
30  
ns VDD = 2.0V  
VDD = 5.0V  
OS20* TINP  
OS21* TRAP  
INT pin input high or low time  
25  
ns  
ns  
PORTA interrupt-on-change new input  
level time  
TCY  
*
These parameters are characterized but not tested.  
Data in “Typ” column is at 5.0V, 25°C unless otherwise stated.  
Note 1: Measurements are taken in RC mode where CLKOUT output is 4 x TOSC.  
2: Includes OSC2 in CLKOUT mode.  
DS41262D-page 240  
© 2007 Microchip Technology Inc.  
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