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PIC16F687-I/ML 参数 Datasheet PDF下载

PIC16F687-I/ML图片预览
型号: PIC16F687-I/ML
PDF下载: 下载PDF文件 查看货源
内容描述: 20引脚基于闪存的8位CMOS微控制器采用纳瓦技术 [20-Pin Flash-Based, 8-Bit CMOS Microcontrollers with nanoWatt Technology]
分类和应用: 闪存微控制器和处理器外围集成电路时钟
文件页数/大小: 294 页 / 5272 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC16F631/677/685/687/689/690  
Table 11-1 shows the timer resources required by the  
ECCP module.  
11.0 ENHANCED  
CAPTURE/COMPARE/PWM  
MODULE  
TABLE 11-1: ECCP MODE – TIMER  
RESOURCES REQUIRED  
The Enhanced Capture/Compare/PWM module is a  
peripheral which allows the user to time and control  
different events. In Capture mode, the peripheral  
allows the timing of the duration of an event. The  
Compare mode allows the user to trigger an external  
event when a predetermined amount of time has  
expired. The PWM mode can generate a Pulse-Width  
Modulated signal of varying frequency and duty cycle.  
ECCP Mode  
Timer Resource  
Capture  
Compare  
PWM  
Timer1  
Timer1  
Timer2  
REGISTER 11-1: CCP1CON: ENHANCED CCP1 CONTROL REGISTER  
R/W-0  
P1M1  
R/W-0  
P1M0  
R/W-0  
R/W-0  
DC1B0  
R/W-0  
R/W-0  
R/W-0  
CCP1M1  
R/W-0  
DC1B1  
CCP1M3  
CCP1M2  
CCP1M0  
bit 7  
bit 0  
Legend:  
R = Readable bit  
-n = Value at POR  
W = Writable bit  
‘1’ = Bit is set  
U = Unimplemented bit, read as ‘0’  
‘0’ = Bit is cleared x = Bit is unknown  
bit 7-6  
P1M<1:0>: PWM Output Configuration bits  
If CCP1M<3:2> = 00, 01, 10:  
xx= P1A assigned as Capture/Compare input; P1B, P1C, P1D assigned as port pins  
If CCP1M<3:2> = 11:  
00= Single output; P1A modulated; P1B, P1C, P1D assigned as port pins  
01= Full-Bridge output forward; P1D modulated; P1A active; P1B, P1C inactive  
10= Half-Bridge output; P1A, P1B modulated with dead-band control; P1C, P1D assigned as port pins  
11= Full-Bridge output reverse; P1B modulated; P1C active; P1A, P1D inactive  
bit 5-4  
DC1B<1:0>: PWM Duty Cycle Least Significant bits  
Capture mode:  
Unused.  
Compare mode:  
Unused.  
PWM mode:  
These bits are the two LSbs of the PWM duty cycle. The eight MSbs are found in CCPR1L.  
bit 3-0  
CCP1M<3:0>: ECCP Mode Select bits  
0000= Capture/Compare/PWM off (resets ECCP module)  
0001= Unused (reserved)  
0010= Compare mode, toggle output on match (CCP1IF bit is set)  
0011= Unused (reserved)  
0100= Capture mode, every falling edge  
0101= Capture mode, every rising edge  
0110= Capture mode, every 4th rising edge  
0111= Capture mode, every 16th rising edge  
1000= Compare mode, set output on match (CCP1IF bit is set)  
1001= Compare mode, clear output on match (CCP1IF bit is set)  
1010= Compare mode, generate software interrupt on match (CCP1IF bit is set, CCP1 pin is  
unaffected)  
1011= Compare mode, trigger special event (CCP1IF bit is set; CCP1 resets TMR1 or TMR2, and starts  
an A/D conversion, if the ADC module is enabled)  
1100= PWM mode; P1A, P1C active-high; P1B, P1D active-high  
1101= PWM mode; P1A, P1C active-high; P1B, P1D active-low  
1110= PWM mode; P1A, P1C active-low; P1B, P1D active-high  
1111= PWM mode; P1A, P1C active-low; P1B, P1D active-low  
© 2007 Microchip Technology Inc.  
DS41262D-page 127  
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