PIC16F631/677/685/687/689/690
8.2.4
COMPARATOR OUTPUT
SELECTION
8.2
Comparator Control
Each comparator has
a
separate control and
The output of the comparator can be monitored by
reading either the CxOUT bit of the CMxCON0 register
or the MCxOUT bit of the CM2CON1 register. In order
to make the output available for an external connection,
the following conditions must be true:
Configuration register: CM1CON0 for Comparator C1
and CM2CON0 for Comparator C2. In addition,
Comparator C2 has
a
second control register,
CM2CON1, for controlling the interaction with Timer1 and
simultaneous reading of both comparator outputs.
• CxOE bit of the CMxCON0 register must be set
• Corresponding TRIS bit must be cleared
The CM1CON0 and CM2CON0 registers (see Registers
8-1 and 8-2, respectively) contain the control and Status
bits for the following:
• CxON bit of the CMxCON0 register must be set
• Enable
Note 1: The CxOE bit overrides the PORT data
latch. Setting the CxON has no impact on
the port override.
• Input selection
• Reference selection
• Output selection
• Output polarity
2: The internal output of the comparator is
latched with each instruction cycle.
Unless otherwise specified, external
outputs are not latched.
8.2.1
COMPARATOR ENABLE
Setting the CxON bit of the CMxCON0 register enables
the comparator for operation. Clearing the CxON bit
disables the comparator resulting in minimum current
consumption.
8.2.5
COMPARATOR OUTPUT POLARITY
Inverting the output of the comparator is functionally
equivalent to swapping the comparator inputs. The
polarity of the comparator output can be inverted by
setting the CxPOL bit of the CMxCON0 register.
Clearing the CxPOL bit results in a non-inverted output.
8.2.2
COMPARATOR INPUT SELECTION
The CxCH<1:0> bits of the CMxCON0 register direct
one of four analog input pins to the comparator
inverting input.
Table 8-1 shows the output state versus input
conditions, including polarity control.
TABLE 8-1:
COMPARATOR OUTPUT
STATE VS. INPUT CONDITIONS
Note:
To use CxIN+ and C12INx- pins as analog
inputs, the appropriate bits must be set in
the ANSEL register and the corresponding
TRIS bits must also be set to disable the
output drivers.
Input Condition
CxPOL
CxOUT
CxVIN- > CxVIN+
CxVIN- < CxVIN+
CxVIN- > CxVIN+
CxVIN- < CxVIN+
0
0
1
1
0
1
1
0
8.2.3
COMPARATOR REFERENCE
SELECTION
Setting the CxR bit of the CMxCON0 register directs an
internal voltage reference or an analog input pin to the
non-inverting input of the comparator. See Section 8.9
“Comparator SR Latch” for more information on the
Internal Voltage Reference module.
8.3
Comparator Response Time
The comparator output is indeterminate for a period of
time after the change of an input source or the selection
of a new reference voltage. This period is referred to as
the response time. The response time of the
comparator differs from the settling time of the voltage
reference. Therefore, both of these times must be
considered when determining the total response time
to a comparator input change. See the Comparator and
Voltage Reference Specifications in Section 17.0
“Electrical Specifications” for more details.
© 2007 Microchip Technology Inc.
DS41262D-page 95
MICROCHIP [ MICROCHIP ]
