PIC16F631/677/685/687/689/690
REGISTER 4-8:
TRISB: PORTB TRI-STATE REGISTER
R/W-1
TRISB7
bit 7
R/W-1
R/W-1
R/W-1
U-0
—
U-0
—
U-0
—
U-0
—
TRISB6
TRISB5
TRISB4
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-4
TRISB<7:4>: PORTB Tri-State Control bit
1= PORTB pin configured as an input (tri-stated)
0= PORTB pin configured as an output
bit 3-0
Unimplemented: Read as ‘0’
REGISTER 4-9:
WPUB: WEAK PULL-UP PORTB REGISTER
R/W-1
WPUB7
bit 7
R/W-1
R/W-1
R/W-1
U-0
—
U-0
—
U-0
—
U-0
—
WPUB6
WPUB5
WPUB4
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
bit 7-4
WPUB<7:4>: Weak Pull-up Register bit
1= Pull-up enabled
0= Pull-up disabled
bit 3-0
Unimplemented: Read as ‘0’
Note 1: Global RABPU bit of the OPTION register must be enabled for individual pull-ups to be enabled.
2: The weak pull-up device is automatically disabled if the pin is in Output mode (TRISB<7:4> = 0).
REGISTER 4-10: IOCB: INTERRUPT-ON-CHANGE PORTB REGISTER
R/W-0
IOCB7
R/W-0
IOCB6
R/W-0
IOCB5
R/W-0
IOCB4
U-0
—
U-0
—
U-0
—
U-0
—
bit 7
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
bit 7-4
bit 3-0
IOCB<7:4>: Interrupt-on-Change PORTB Control bit
1= Interrupt-on-change enabled
0= Interrupt-on-change disabled
Unimplemented: Read as ‘0’
DS41262D-page 70
© 2007 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
