PIC16F631/677/685/687/689/690
FIGURE 1-3:
PIC16F685 BLOCK DIAGRAM
INT
Configuration
13
Program Counter
Flash
4K x 14
Program
Memory
8-Level Stack (13-bit)
RAM
256 bytes
File
Registers
RAM Addr
9
Addr MUX
Instruction Reg
Direct Addr
7
8
Indirect
Addr
RB4
RB5
RB6
RB7
PORTB
RA0
RA1
RA2
RA3
RA4
RA5
Data Bus
8
PORTA
Program 14
Bus
FSR Reg
STATUS Reg
8
PORTC
3
Power-up
Timer
Instruction
Decode and
Control
OSC1/CLKI
OSC2/CLKO
Timing
Generation
Oscillator
Start-up Timer
Power-on
Reset
Watchdog
Timer
Brown-out
Reset
Internal
Oscillator
Block
MCLR V
DD
ULPWU
T0CKI
V
SS
T1G
T1CKI
8
W Reg
ALU
MUX
RC0
RC1
RC2
RC3
RC4
RC5
RC6
RC7
CCP1/
P1A P1B P1C P1D
Ultra Low-Power
Wake-up
Timer0
Timer1
Timer2
ECCP+
AN8 AN9 AN10 AN11
EEDAT
2
Analog Comparators
and Reference
8
256 Bytes
Data
EEPROM
EEADR
Analog-To-Digital Converter
V
REF
AN0 AN1 AN2 AN3 AN4 AN5 AN6 AN7 C1IN- C1IN+ C1OUT C2IN- C2IN+ C2OUT
©
2007 Microchip Technology Inc.
DS41262D-page 11
MICROCHIP [ MICROCHIP TECHNOLOGY ]
