PIC16F631/677/685/687/689/690
TABLE 9-2:
SUMMARY OF ASSOCIATED ADC REGISTERS
Value on
all other
Resets
Value on
POR, BOR
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
ADCON0
ADCON1
ANSEL
ADFM
—
VCFG
ADCS2
ANS6
—
CHS3
ADCS1
ANS5
—
CHS2
ADCS0
ANS4
—
CHS1
—
CHS0
—
GO/DONE ADON
0000 0000 0000 0000
-000 ---- -000 ----
1111 1111 1111 1111
---- 1111 ---- 1111
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
0000 000x 0000 000x
—
—
ANS7
—
ANS3
ANS11
ANS2
ANS10
ANS1
ANS9
ANS0
ANS8
ANSELH
ADRESH A/D Result Register High Byte
ADRESL A/D Result Register Low Byte
INTCON
PIE1
GIE
—
PEIE
ADIE
ADIF
—
T0IE
RCIE
RCIF
RA5
INTE
TXIE
TXIF
RA4
RB4
RC4
RABIE
SSPIE
SSPIF
RA3
T0IF
CCP1IE
CCP1IF
RA2
INTF
TMR2IE
TMR2IF
RA1
RABIF
TMR1IE -000 0000 -000 0000
TMR1IF -000 0000 -000 0000
PIR1
—
PORTA
PORTB
PORTC
TRISA
TRISB
TRISC
Legend:
—
RA0
—
--xx xxxx --uu uuuu
xxxx ---- uuuu ----
xxxx xxxx uuuu uuuu
RB7
RC7
—
RB6
RC6
—
RB5
—
—
—
RC5
RC3
RC2
RC1
RC0
TRISA5 TRISA4 TRISA3 TRISA2
TRISA1
—
TRISA0 --11 1111 --11 1111
1111 ---- 1111 ----
TRISC0 1111 1111 1111 1111
TRISB7 TRISB6 TRISB5 TRISB4
—
—
—
TRISC7 TRISC6 TRISC5 TRISC4 TRISC3 TRISC2
TRISC1
x= unknown, u= unchanged, —= unimplemented read as ‘0’. Shaded cells are not used for ADC module.
DS41262D-page 118
© 2007 Microchip Technology Inc.
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