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PIC16F685-I/P 参数 Datasheet PDF下载

PIC16F685-I/P图片预览
型号: PIC16F685-I/P
PDF下载: 下载PDF文件 查看货源
内容描述: 20引脚基于闪存的8位CMOS微控制器采用纳瓦技术 [20-Pin Flash-Based, 8-Bit CMOS Microcontrollers with nanoWatt Technology]
分类和应用: 闪存微控制器
文件页数/大小: 294 页 / 5272 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC16F631/677/685/687/689/690  
an A/D acquisition must be done before the conversion  
can be started. To calculate the minimum acquisition  
time, Equation 9-1 may be used. This equation  
assumes that 1/2 LSb error is used (1024 steps for the  
ADC). The 1/2 LSb error is the maximum error allowed  
for the ADC to meet its specified resolution.  
9.3  
A/D Acquisition Requirements  
For the ADC to meet its specified accuracy, the charge  
holding capacitor (CHOLD) must be allowed to fully  
charge to the input channel voltage level. The Analog  
Input model is shown in Figure 9-4. The source  
impedance (RS) and the internal sampling switch (RSS)  
impedance directly affect the time required to charge the  
capacitor CHOLD. The sampling switch (RSS) impedance  
varies over the device voltage (VDD), see Figure 9-4.  
The maximum recommended impedance for analog  
sources is 10 kΩ. As the source impedance is  
decreased, the acquisition time may be decreased.  
After the analog input channel is selected (or changed),  
EQUATION 9-1:  
ACQUISITION TIME EXAMPLE  
Temperature = 50°C and external impedance of 10kΩ 5.0V VDD  
Assumptions:  
TACQ = Amplifier Settling Time + Hold Capacitor Charging Time + Temperature Coefficient  
= TAMP + TC + TCOFF  
= 5µs + TC + [(Temperature - 25°C)(0.05µs/°C)]  
The value for TC can be approximated with the following equations:  
1
2047  
= VCHOLD  
-----------  
;[1] VCHOLD charged to within 1/2 lsb  
VAPPLIED 1 –  
TC  
---------  
VAPPLIED 1 e RC = VCHOLD  
;[2] VCHOLD charge response to VAPPLIED  
Tc  
--------  
1
2047  
VAPPLIED 1 eRC = VAPPLIED 1 –  
;combining [1] and [2]  
-----------  
Solving for TC:  
TC = CHOLD(RIC + RSS + RS) ln(1/2047)  
= 10pF(1kΩ + 7kΩ + 10kΩ) ln(0.0004885)  
= 1.37µs  
Therefore:  
TACQ = 5µS + 1.37µS + [(50°C- 25°C)(0.05µS/°C)]  
= 7.67µS  
Note 1: The reference voltage (VREF) has no effect on the equation, since it cancels itself out.  
2: The charge holding capacitor (CHOLD) is not discharged after each conversion.  
3: The maximum recommended impedance for analog sources is 10 kΩ. This is required to meet the pin  
leakage specification.  
DS41262D-page 116  
© 2007 Microchip Technology Inc.