PIC16F631/677/685/687/689/690
REGISTER 8-5:
VRCON: VOLTAGE REFERENCE CONTROL REGISTER
R/W-0
C1VREN
bit 7
R/W-0
R/W-0
VRR
R/W-0
R/S-0
VR3
R/S-0
VR2
U-0
U-0
C2VREN
VP6EN
VR1
VR0
bit 0
Legend:
S = Bit is set only
W = Writable bit
‘1’ = Bit is set
R = Readable bit
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3-0
C1VREN: Comparator C1 Voltage Reference Enable bit
1= CVREF circuit powered on and routed to C1VREF input of Comparator C1
0= 0.6 Volt constant reference routed to C1VREF input of Comparator C1
C2VREN: Comparator C2 Voltage Reference Enable bit
1= CVREF circuit powered on and routed to C2VREF input of Comparator C2
0= 0.6 Volt constant reference routed to C2VREF input of Comparator C2
VRR: Comparator Voltage Reference CVREF Range Selection bit
1= Low Range
0= High Range
VP6EN: 0.6V Reference Enable bit
1= Enabled
0= Disabled
VR<3:0>: Comparator Voltage Reference CVREF Value Selection 0 ≤ VR<3:0> ≤ 15
When VRR = 1: CVREF = (VR<3:0>/24) * VDD
When VRR = 0: CVREF = VDD/4 + (VR<3:0>/32) * VDD
TABLE 8-2:
SUMMARY OF REGISTERS ASSOCIATED WITH THE COMPARATOR AND VOLTAGE
REFERENCE MODULES
Value on
Value on
POR, BOR
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
all other
Resets
ANSEL
ANS7
C1ON
C2ON
ANS6
C1OUT
C2OUT
ANS5
ANS4
ANS3
—
ANS2
C1R
C2R
—
ANS1
C1CH1
C2CH1
T1GSS
INTF
—
ANS0
C1CH0
C2CH0
C2SYNC
RABIF
—
1111 1111 1111 1111
0000 -000 0000 0000
0000 -000 0000 -000
00-- --10 00-- --10
0000 000x 0000 000x
0000 ---- 0000 ----
CM1CON0
CM2CON0
C1OE C1POL
C2OE C2POL
—
CM2CON1 MC1OUT MC2OUT
—
—
—
INTCON
PIE2
GIE
OSFIE
OSFIF
—
PEIE
C2IE
C2IF
—
T0IE
C1IE
C1IF
RA5
INTE
EEIE
EEIF
RA4
RABIE
—
T0IF
—
PIR2
—
—
—
—
0000----
0000----
PORTA
PORTC
REFCON
SRCON
TRISA
RA3
RC3
VREN
RA2
RC2
RA1
RA0
--xx xxxx --uu uuuu
xxxx xxxx uuuu uuuu
--00 000- --00 000-
0000 00-- 0000 00--
--11 1111 --11 1111
1111 1111 1111 1111
0000 0000 0000 0000
RC7
—
RC6
—
RC5
BGST
RC4
VRBB
RC1
RC0
VROE CVROE
—
SR1
—
SR0
—
C1SEN C2REN PULSS PULSR
—
—
TRISA5 TRISA4 TRISA3 TRISA2 TRISA1
TRISA0
TRISC0
VR0
TRISC
TRISC7
TRISC6 TRISC5 TRISC4 TRISC3 TRISC2 TRISC1
VRCON
Legend:
C1VREN C2VREN VRR VP6EN VR3 VR2 VR1
x= unknown, u= unchanged, – = unimplemented, read as ‘0’. Shaded cells are not used for comparator.
DS41262D-page 106
© 2007 Microchip Technology Inc.
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