PIC16F630/676
register are maintained set when using them as analog
inputs. I/O pins configured as analog input always read
‘0’.
3.0
PORTS A AND C
There are as many as twelve general purpose I/O pins
available. Depending on which peripherals are
enabled, some or all of the pins may not be available as
general purpose I/O. In general, when a peripheral is
enabled, the associated pin may not be used as a
general purpose I/O pin.
Note: The ANSEL (91h) and CMCON (19h)
registers must be initialized to configure an
analog channel as a digital input. Pins
configured as analog inputs will read ‘0’.
The ANSEL register is defined for the
PIC16F676.
Note: Additional information on I/O ports may be
found in the PIC® Mid-Range Reference
Manual, (DS33023)
EXAMPLE 3-1:
INITIALIZING PORTA
bcf
STATUS,RP0
PORTA
05h
CMCON
STATUS,RP0
ANSEL
0Ch
;Bank 0
;Init PORTA
3.1
PORTA and the TRISA Registers
clrf
movlw
movwf
bsf
clrf
movlw
movwf
;Set RA<2:0> to
;digital I/O
;Bank 1
;digital I/O
;Set RA<3:2> as inputs
;and set RA<5:4,1:0>
;as outputs
PORTA is an 6-bit wide, bi-directional port. The corre-
sponding data direction register is TRISA. Setting a
TRISA bit (= 1) will make the corresponding PORTA pin
an input (i.e., put the corresponding output driver in a
Hi-impedance mode). Clearing a TRISA bit (= 0) will
make the corresponding PORTA pin an output (i.e., put
the contents of the output latch on the selected pin).
The exception is RA3, which is input only and its TRIS
bit will always read as ‘1’. Example 3-1 shows how to
initialize PORTA.
TRISA
bcf
STATUS,RP0
;Bank 0
3.2
Additional Pin Functions
Every PORTA pin on the PIC16F630/676 has an
interrupt-on-change option and every PORTA pin,
except RA3, has a weak pull-up option. The next two
sections describe these functions.
Reading the PORTA register reads the status of the
pins, whereas writing to it will write to the port latch. All
write operations are read-modify-write operations.
Therefore, a write to a port implies that the port pins are
read, this value is modified and then written to the port
data latch. RA3 reads ‘0’ when MCLREN = 1.
3.2.1
WEAK PULL-UP
Each of the PORTA pins, except RA3, has an individu-
ally configurable weak internal pull-up. Control bits
WPUAx enable or disable each pull-up. Refer to
Register 3-3. Each weak pull-up is automatically turned
off when the port pin is configured as an output. The
pull-ups are disabled on a Power-on Reset by the
RAPU bit (OPTION<7>).
The TRISA register controls the direction of the
PORTA pins, even when they are being used as analog
inputs. The user must ensure the bits in the TRISA
REGISTER 3-1:
PORTA — PORTA REGISTER (ADDRESS: 05h)
U-0
—
U-0
—
R/W-x
RA5
R/W-x
RA4
R/W-x
RA3
R/W-x
RA2
R/W-x
RA1
R/W-x
RA0
bit 7
bit 0
bit 7-6:
bit 5-0:
Unimplemented: Read as ’0’
PORTA<5:0>: PORTA I/O pin
1= Port pin is >VIH
0= Port pin is <VIL
Legend:
R = Readable bit
W = Writable bit
’1’ = Bit is set
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared x = Bit is unknown
- n = Value at POR
© 2007 Microchip Technology Inc.
DS40039E-page 19
MICROCHIP [ MICROCHIP ]
