PIC16F627A/628A/648A
FIGURE 3-1:
BLOCK DIAGRAM
13
Program Counter
Flash
Program
Memory
8-Level Stack
(13-bit)
Program
Bus
14
Instruction Reg
Direct Addr
7
Data Bus
8
RAM
File
Registers
PORTA
RA0/AN0
RA1/AN1
RA2/AN2/V
REF
RA3/AN3/CMP1
RA4/T0CK1/CMP2
RA5/MCLR/V
PP
RA6/OSC2/CLKOUT
RA7/OSC1/CLKIN
RAM Addr (1)
9
Addr MUX
8
Indirect
Addr
FSR Reg
Status Reg
8
3
PORTB
Power-up
Timer
Instruction
Decode &
Control
Timing
Generation
OSC1/CLKIN
OSC2/CLKOUT
Oscillator
Start-up Timer
Power-on
Reset
Watchdog
Timer
Brown-out
Reset
Low-Voltage
Programming
8
MUX
ALU
W Reg
RB0/INT
RB1/RX/DT
RB2/TX/CK
RB3/CCP1
RB4/PGM
RB5
RB6/T1OSO/T1CKI/PGC
RB7/T1OSI/PGD
MCLR
V
DD
, V
SS
Comparator
Timer0
Timer1
Timer2
V
REF
CCP1
USART
Data EEPROM
Note
1:
Higher order bits are from the Status register.
DS40044F-page 10
©
2007 Microchip Technology Inc.
MICROCHIP [ MICROCHIP TECHNOLOGY ]
