PIC16F5X
FIGURE 11-5:
RESET, WATCHDOG TIMER, AND DEVICE RESET TIMER TIMING -– PIC16F5X
VDD
MCLR
30
Internal
POR
32
32
32
DRT
Time-out
Internal
RESET
Watchdog
Timer
Reset
31
34
34
(1)
I/O pin
Note 1: Please refer to Figure 11-2 for load conditions.
TABLE 11-3: RESET, WATCHDOG TIMER AND DEVICE RESET TIMER – PIC16F5X
Standard Operating Conditions (unless otherwise specified)
Operating Temperature -40°C ≤ TA ≤ +85°C for industrial
-40°C ≤ TA ≤ +125°C for extended
AC CHARACTERISTICS
Param
Sym.
No.
Characteristic
Min. Typ† Max. Units
Conditions
30
31
TMCL MCLR Pulse Width (low)
2000*
—
—
ns VDD = 5.0V
TWDT Watchdog Timer Time-out Period
(No Prescaler)
9.0*
9.0*
18*
18*
30*
40*
ms VDD = 5.0V (industrial)
VDD = 5.0V (extended)
32
34
TDRT
Device Reset Timer Period
9.0*
9.0*
18*
18*
30*
40*
ms VDD = 5.0V (industrial)
VDD = 5.0V (extended)
TIOZ
I/O high-impedance from MCLR
Low
100* 300* 2000* ns
*
These parameters are characterized but not tested.
†
Data in the Typical (“Typ”) column is at 5.0V, 25°C unless otherwise stated. These parameters are for
design guidance only and are not tested.
DS41213D-page 66
© 2007 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
