PIC16F5X
IORLW
Inclusive OR literal with W
MOVF
Move f
Syntax:
[ label ] IORLW k
0 ≤ k ≤ 255
Syntax:
[ label ] MOVF f, d
Operands:
Operation:
Status Affected:
Encoding:
Operands:
0 ≤ f ≤ 31
d ∈ [0,1]
(W) .OR. (k) → (W)
Z
Operation:
(f) → (dest)
Status Affected:
Encoding:
Z
1101
kkkk
kkkk
0010
00df
ffff
Description:
The contents of the W register are
OR’ed with the eight-bit literal ‘k’.
The result is placed in the W
register.
Description:
The contents of register ‘f’ is
moved to destination ‘d’. If ‘d’ is ‘0’,
destination is the W register. If ‘d’
is ‘1’, the destination is file
register ‘f’. ‘d’ is ‘1’ is useful to test
a file register since Status flag Z is
affected.
Words:
1
Cycles:
Example:
1
IORLW 0x35
Words:
1
1
Before Instruction
0x9A
After Instruction
W
=
Cycles:
Example:
MOVF
FSR,
0
W
Z
=
=
0xBF
0
After Instruction
W
=
value in FSR register
IORWF
Inclusive OR W with f
MOVLW
Move Literal to W
Syntax:
[ label ] IORWF f, d
Syntax:
[ label ] MOVLW k
0 ≤ k ≤ 255
Operands:
0 ≤ f ≤ 31
d ∈ [0,1]
Operands:
Operation:
k → (W)
Operation:
(W).OR. (f) → (dest)
Status Affected: None
Status Affected:
Encoding:
Z
Encoding:
1100
kkkk
kkkk
0001
00df
ffff
Description:
The eight-bit literal ‘k’ is loaded
into the W register.
Description:
Inclusive OR the W register with
register ‘f’. If ‘d’ is ‘0’, the result is
placed in the W register. If ‘d’ is ‘1’,
the result is placed back in
register ‘f’.
Words:
1
Cycles:
Example:
1
MOVLW 0x5A
Words:
1
1
After Instruction
W
=
0x5A
Cycles:
Example:
IORWF
RESULT, 0
Before Instruction
RESULT
W
=
=
0x13
0x91
After Instruction
RESULT
W
Z
=
=
=
0x13
0x93
0
DS41213D-page 48
© 2007 Microchip Technology Inc.