PIC16F5X
The TO and PD bits (STATUS <4:3>) are set or cleared
depending on the different Reset conditions (Table 5-1).
These bits may be used to determine the nature of the
Reset.
5.0
RESET
The PIC16F5X devices may be reset in one of the
following ways:
• Power-on Reset (POR)
Table 5-3 lists a full description of Reset states of all
registers. Figure 5-1 shows a simplified block diagram
of the on-chip Reset circuit.
• MCLR Reset (normal operation)
• MCLR Wake-up Reset (from Sleep)
• WDT Reset (normal operation)
• WDT Wake-up Reset (from Sleep)
Table 5-1 shows these Reset conditions for the PCL
and STATUS registers.
Some registers are not affected in any Reset condition.
Their status is unknown on POR and unchanged in any
other Reset. Most other registers are reset to a “Reset
state” on Power-on Reset (POR), MCLR or WDT
Reset. A MCLR or WDT wake-up from Sleep also
results in a device Reset and not a continuation of
operation before Sleep.
TABLE 5-1:
STATUS BITS AND THEIR SIGNIFICANCE
Condition
TO
PD
Power-on Reset
1
u
1
0
0
1
u
0
1
0
MCLR Reset (normal operation)
MCLR Wake-up (from Sleep)
WDT Reset (normal operation)
WDT Wake-up (from Sleep)
Legend: u= unchanged, x= unknown, — = unimplemented read as ‘0’.
TABLE 5-2:
SUMMARY OF REGISTERS ASSOCIATED WITH RESET
Value on
MCLR and
WDT Reset
Value on
POR
Address Name
Bit 7 Bit 6 Bit 5 Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
03h
STATUS
PA2
PA1
PA0
TO
PD
Z
DC
C
0001 1xxx 000q quuu
Legend: u= unchanged, x= unknown, q= see Table 5-1 for possible values.
© 2007 Microchip Technology Inc.
DS41213D-page 23
MICROCHIP [ MICROCHIP ]
