PIC16F5X
CALL
Subroutine Call
CLRW
Clear W
Syntax:
[ label ] CALL k
0 ≤ k ≤ 255
Syntax:
[ label ] CLRW
Operands:
Operation:
Operands:
Operation:
None
(PC) + 1→ TOS;
k → PC<7:0>;
00h → (W);
1 → Z
(Status<6:5>) → PC<10:9>;
0 → PC<8>
Status Affected:
Encoding:
Z
0000
0100
0000
Status Affected: None
Description:
The W register is cleared. Zero bit
(Z) is set.
Encoding:
1001
kkkk
kkkk
Description:
Subroutine call. First, return
address (PC + 1) is pushed onto
the stack. The eight-bit immediate
address is loaded into PC bits
<7:0>. The upper bits PC<10:9>
are loaded from STATUS<6:5>,
PC<8> is cleared. CALLis a
two-cycle instruction.
Words:
1
Cycles:
Example:
1
CLRW
Before Instruction
W
=
0x5A
After Instruction
W
Z
=
=
0x00
1
Words:
1
2
Cycles:
Example:
HERE
CALL
THERE
Before Instruction
PC
=
address (HERE)
After Instruction
PC
TOS
=
=
address (THERE)
address (HERE + 1)
CLRF
Clear f
[ label ] CLRF
CLRWDT
Clear Watchdog Timer
Syntax:
f
Syntax:
[ label ] CLRWDT
Operands:
Operation:
0 ≤ f ≤ 31
Operands:
Operation:
None
00h → (f);
1 → Z
00h → WDT;
0 → WDT prescaler (if assigned);
1 → TO;
1 → PD
Status Affected:
Encoding:
Z
0000
011f
ffff
Status Affected: TO, PD
Description:
The contents of register ‘f’ are
cleared and the Z bit is set.
Encoding:
0000
0000
0100
Description:
The CLRWDTinstruction resets the
WDT. It also resets the prescaler if
the prescaler is assigned to the
WDT and not Timer0. Status bits
TO and PD are set.
Words:
1
1
Cycles:
Example:
CLRF
FLAG_REG
Before Instruction
FLAG_REG
=
0x5A
Words:
1
After Instruction
FLAG_REG
Z
Cycles:
Example:
1
=
=
0x00
1
CLRWDT
Before Instruction
WDT counter
After Instruction
WDT counter
=
=
?
0x00
WDT prescaler =
0
1
1
TO
PD
=
=
© 2007 Microchip Technology Inc.
DS41213D-page 45
MICROCHIP [ MICROCHIP ]
