PIC16F870/871
TABLE 11-6: INITIALIZATION CONDITIONS FOR ALL REGISTERS
Register
Devices
Power-on Reset,
Brown-out Reset
MCLR Resets
WDT Reset
Wake-up via WDT or
Interrupt
W
870 871
870 871
870 871
870 871
870 871
870 871
870 871
870 871
870 871
870 871
870 871
870 871
870 871
870 871
870 871
870 871
870 871
870 871
870 871
870 871
870 871
870 871
870 871
870 871
870 871
870 871
870 871
870 871
870 871
870 871
870 871
870 871
870 871
870 871
870 871
870 871
870 871
870 871
870 871
870 871
870 871
870 871
870 871
xxxx xxxx
N/A
uuuu uuuu
N/A
uuuu uuuu
N/A
INDF
TMR0
xxxx xxxx
0000h
uuuu uuuu
0000h
uuuu uuuu
PC + 1(2)
uuuq quuu(3)
uuuu uuuu
--uu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
---- -uuu
---u uuuu
uuuu uuuu(1)
ruuu -uuu(1)
uuuu -uuu(1)
---u ----(1)
uuuu uuuu
uuuu uuuu
--uu uuuu
uuuu uuuu
-uuu uuuu
uuuu uuuu
uuuu uuuu
--uu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uu-u
uuuu uuuu
--uu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu -uuu
ruuu -uuu
uuuu uuuu
---u ----
---- --uu
1111 1111
uuuu -uuu
uuuu uuuu
uuuu uuuu
PCL
STATUS
FSR
0001 1xxx
xxxx xxxx
--0x 0000
xxxx xxxx
xxxx xxxx
xxxx xxxx
---- -xxx
---0 0000
0000 000x
r000 -000
0000 -000
---0 ----
xxxx xxxx
xxxx xxxx
--00 0000
0000 0000
-000 0000
xxxx xxxx
xxxx xxxx
--00 0000
0000 000x
0000 0000
0000 0000
xxxx xxxx
0000 00-0
1111 1111
--11 1111
1111 1111
1111 1111
1111 1111
0000 -111
r000 -000
0000 0000
---0 ----
---- --qq
1111 1111
0000 -010
0000 0000
xxxx xxxx
000q quuu(3)
uuuu uuuu
--0u 0000
uuuu uuuu
uuuu uuuu
uuuu uuuu
---- -uuu
---0 0000
0000 000u
r000 -000
0000 -000
---0 ----
uuuu uuuu
uuuu uuuu
--uu uuuu
0000 0000
-000 0000
uuuu uuuu
uuuu uuuu
--00 0000
0000 000x
0000 0000
0000 0000
uuuu uuuu
0000 00-0
1111 1111
--11 1111
1111 1111
1111 1111
1111 1111
0000 -111
r000 -000
0000 0000
---0 ----
---- --uu
1111 1111
0000 -010
0000 0000
uuuu uuuu
PORTA
PORTB
PORTC
PORTD
PORTE
PCLATH
INTCON
PIR1
PIR2
TMR1L
TMR1H
T1CON
TMR2
T2CON
CCPR1L
CCPR1H
CCP1CON
RCSTA
TXREG
RCREG
ADRESH
ADCON0
OPTION_REG
TRISA
TRISB
TRISC
TRISD
TRISE
PIE1
PIE2
PCON
PR2
TXSTA
SPBRG
ADRESL
Legend: u = unchanged,
x = unknown, -= unimplemented bit, read as ’0’, q= value depends
on condition, r= reserved maintain clear.
Note 1: One or more bits in INTCON, PIR1 and/or PIR2 will be affected (to cause wake-up).
2: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the inter-
rupt vector (0004h).
3: See Table 11-5 for reset value for specific condition.
DS30569A-page 96
Preliminary
1999 Microchip Technology Inc.