PIC16F870/871
TABLE 10-2: REGISTERS/BITS ASSOCIATED WITH A/D
POR,
BOR
MCLR,
WDT
Addr
Name
Bit 7
Bit 6 Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0Bh
0Ch
INTCON
PIR1
GIE
PEIE
ADIF
ADIE
T0IE
RCIF
RCIE
INTE
TXIF
TXIE
RBIE
—
T0IF
INTF
RBIF
0000 000x
0000 -000
0000 000u
0000 -000
PSPIF(1)
PSPIE(1)
CCP1IF
CCP1IE
TMR2IF
TMR1IF
8Ch
1Eh
9Eh
1Fh
9Fh
85h
05h
PIE1
—
TMR2IE TMR1IE
0000 -000
xxxx xxxx
xxxx xxxx
0000 00-0
--0- 0000
--11 1111
--0x 0000
0000 -111
0000 -000
uuuu uuuu
uuuu uuuu
0000 00-0
--0- 0000
--11 1111
--0u 0000
0000 -111
ADRESH
ADRESL
ADCON0
ADCON1
TRISA
A/D Result Register High Byte
A/D Result Register Low Byte
ADCS1
ADFM
—
ADCS0
—
CHS2
—
CHS1
—
CHS0
GO/DONE
PCFG2
—
ADON
PCFG3
PCFG1
PCFG0
—
PORTA Data Direction Register
PORTA Data Latch when written: PORTA pins when read
PORTA
TRISE
—
—
89h(1)
IBF
OBF
IBOV
—
PSPMODE
—
—
—
PORTE Data Direction Bits
RE2 RE1
09h(1)
PORTE
—
—
RE0
---- -xxx
---- -uuu
Legend:
x= unknown, u= unchanged, -= unimplemented read as '0'. Shaded cells are not used for A/D conversion.
Note 1: These registers/bits are not available on the PIC16F870.
1999 Microchip Technology Inc.
Preliminary
DS30569A-page 87