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PIC16F870-I/SP 参数 Datasheet PDF下载

PIC16F870-I/SP图片预览
型号: PIC16F870-I/SP
PDF下载: 下载PDF文件 查看货源
内容描述: 40分之28引脚8位CMOS闪存微控制器 [28/40-Pin 8-Bit CMOS FLASH Microcontrollers]
分类和应用: 闪存微控制器和处理器外围集成电路装置光电二极管PC时钟
文件页数/大小: 156 页 / 2816 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC16F870/871  
the operation of CCP1. The special event trigger is gen-  
erated by a compare match and will reset Timer1 and  
start an A/D conversion (if the A/D module is enabled).  
8.0  
CAPTURE/COMPARE/PWM  
MODULE  
The Capture/Compare/PWM (CCP) module contains a  
16-bit register which can operate as a:  
Additional information on CCP modules is available in  
the PICmicro™ Mid-Range MCU Family Reference  
Manual (DS33023) and in Application Note 594, “Using  
the CCP Modules” (DS00594).  
• 16-bit Capture register  
• 16-bit Compare register  
• PWM master/slave Duty Cycle register  
TABLE 8-1:  
CCP MODE - TIMER  
Table 8-1 shows the resources used by the CCP mod-  
ule. In the following sections, the operation of a CCP  
module is described.  
RESOURCES REQUIRED  
CCP Mode  
Timer Resource  
Capture  
Compare  
PWM  
Timer1  
Timer1  
Timer2  
CCP1 Module:  
Capture/Compare/PWM Register1 (CCPR1) is com-  
prised of two 8-bit registers: CCPR1L (low byte) and  
CCPR1H (high byte). The CCP1CON register controls  
REGISTER 8-1: CCP1CON REGISTER (ADDRESS: 17h)  
U-0  
U-0  
R/W-0  
R/W-0  
R/W-0  
R/W-0  
R/W-0  
R/W-0  
CCP1X  
CCP1Y  
CCP1M3  
CCP1M2  
CCP1M1  
CCP1M0  
R =Readable bit  
W =Writable bit  
bit7  
bit0  
U =Unimplemented bit, read as ‘0’  
- n =Value at POR reset  
bit 7-6: Unimplemented: Read as ’0’  
bit 5-4: CCP1<X:Y>: PWM Least Significant bits  
Capture Mode: Unused  
Compare Mode: Unused  
PWM Mode: These bits are the two LSbs of the PWM duty cycle. The eight MSbs are found in CCPR1L.  
bit 3-0: CCP1M<3:0>: CCPx Mode Select bits  
0000= Capture/Compare/PWM off (resets CCP module)  
0100= Capture mode, every falling edge  
0101= Capture mode, every rising edge  
0110= Capture mode, every 4th rising edge  
0111= Capture mode, every 16th rising edge  
1000= Compare mode, set output on match (CCP1IF bit is set)  
1001= Compare mode, clear output on match (CCP1IF bit is set)  
1010= Compare mode, generate software interrupt on match (CCP1IF bit is set, CCP pin is unaffected)  
1011= Compare mode, trigger special event (CCP1IF bit is set, CCP1 pin is unaffected); CCP1 resets  
TMR1 and starts an A/D conversion (if A/D module is enabled)  
11xx= PWM mode  
1999 Microchip Technology Inc.  
Preliminary  
DS30569A -page 57  
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