PIC16F870/871
4.7
Write Verify
4.9
Operation during Code Protect
Depending on the application, good programming prac-
tice may dictate that the value written to the memory
should be verified against the original value. This
should be used in applications where excessive writes
can stress bits near the specification limit.
Each reprogrammable memory block has its own code
protect mechanism. External Read and Write opera-
tions are disabled if either of these mechanisms are
enabled.
4.9.1
DATA EEPROM MEMORY
Generally a write failure will be a bit which was written
as a ’1’, but reads back as a ’0’ (due to leakage off the
bit).
The microcontroller itself can both read and write to the
internal Data EEPROM, regardless of the state of the
code protect configuration bit.
4.8
Protection Against Spurious Write
When data memory is code protected (CONFIG<8>=0)
any further external programming access of program
memory is disabled. To reenable programming access
to program memory, both bulk erase and removal of
code protection must be performed on program and
data memory.
4.8.1
EEPROM DATA MEMORY
There are conditions when the device may not want to
write to the data EEPROM memory. To protect against
spurious EEPROM writes, various mechanisms have
been built-in. On power-up, the WREN bit is cleared.
Also, the Power-up Timer (72 ms duration) prevents
EEPROM write.
4.9.2
PROGRAM FLASH MEMORY
The microcontroller can read and execute instructions
out of the internal FLASH program memory, regardless
of the state of the code protect configuration bits. How-
ever, the WRT configuration bit and the code protect
bits have different effects on writing to program mem-
ory. Table 4-1 shows the various configurations and
status of reads and writes. To erase the WRT or code
protection bits in the configuration word requires that
the device be fully erased.
The write initiate sequence and the WREN bit together
help prevent an accidental write during brown-out,
power glitch, or software malfunction.
4.8.2
PROGRAM FLASH MEMORY
To protect against spurious writes to FLASH program
memory, the WRT bit in the configuration word may be
programmed to ‘0’ to prevent writes. The write initiate
sequence must also be followed. WRT and the configu-
ration word cannot be programmed by user code, only
through the use of an external programmer.
TABLE 4-1:
READ/WRITE STATE OF INTERNAL FLASH PROGRAM MEMORY
Configuration Bits
Internal
Read
Internal
Write
Memory Location
ICSP Read ICSP Write
CP1
CP0
WRT
0
0
1
1
0
0
1
1
1
0
0
1
All program memory
All program memory
All program memory
All program memory
Yes
Yes
Yes
Yes
Yes
No
No
No
No
No
No
Yes
Yes
Yes
Yes
Yes
DS30569A-page 44
Preliminary
1999 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
