PIC16F7X7
When setting up an Asynchronous Reception, follow
these steps:
6. Flag bit RCIF will be set when reception is
complete and an interrupt will be generated if
enable bit RCIE is set.
1. Initialize the SPBRG register for the appropriate
baud rate. If a high-speed baud rate is desired,
set bit BRGH (see Section 11.1 “AUSART
Baud Rate Generator (BRG)”).
7. Read the RCSTA register to get the ninth bit (if
enabled) and determine if any error occurred
during reception.
8. Read the 8-bit received data by reading the
RCREG register.
2. Enable the asynchronous serial port by clearing
bit SYNC and setting bit SPEN.
9. If any error occurred, clear the error by clearing
enable bit CREN.
3. If interrupts are desired, then set enable bit
RCIE.
10. If using interrupts, ensure that GIE and PEIE
(bits 7 and 6) of the INTCON register are set.
4. If 9-bit reception is desired, then set bit RX9.
5. Enable the reception by setting bit CREN.
TABLE 11-8: REGISTERS ASSOCIATED WITH ASYNCHRONOUS RECEPTION
Value on
all other
Resets
Value on:
POR, BOR
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0Bh, 8Bh, INTCON
10Bh,18Bh
GIE
PEIE
TMR0IE INT0IE RBIE TMR0IF INT0IF
RBIF
0000 000x 0000 000u
(1)
0Ch
PIR1
PSPIF
SPEN
ADIF
RX9
RCIF
TXIF
SSPIF CCP1IF TMR2IF TMR1IF 0000 0000 0000 0000
18h
RCSTA
SREN CREN ADDEN FERR
OERR
RX9D
0000 000x 0000 000x
0000 0000 0000 0000
1Ah
RCREG AUSART Receive Data Register
(1)
8Ch
PIE1
PSPIE
CSRC
ADIE
TX9
RCIE
TXIE
SSPIE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000
98h
TXSTA
TXEN
SYNC
—
BRGH
TRMT
TX9D
0000 -010 0000 -010
0000 0000 0000 0000
99h
SPBRG Baud Rate Generator Register
Legend:
x= unknown, — = unimplemented locations read as ‘0’. Shaded cells are not used for asynchronous reception.
Note 1: Bits PSPIE and PSPIF are reserved on 28-pin devices; always maintain these bits clear.
2004 Microchip Technology Inc.
DS30498C-page 141
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