欢迎访问ic37.com |
会员登录 免费注册
发布采购

PIC16F77-I/PT 参数 Datasheet PDF下载

PIC16F77-I/PT图片预览
型号: PIC16F77-I/PT
PDF下载: 下载PDF文件 查看货源
内容描述: 40分之28引脚, 8位CMOS闪存微控制器 [28/40-pin, 8-bit CMOS FLASH Microcontrollers]
分类和应用: 闪存微控制器
文件页数/大小: 174 页 / 3853 K
品牌: MICROCHIP [ MICROCHIP ]
 浏览型号PIC16F77-I/PT的Datasheet PDF文件第11页浏览型号PIC16F77-I/PT的Datasheet PDF文件第12页浏览型号PIC16F77-I/PT的Datasheet PDF文件第13页浏览型号PIC16F77-I/PT的Datasheet PDF文件第14页浏览型号PIC16F77-I/PT的Datasheet PDF文件第16页浏览型号PIC16F77-I/PT的Datasheet PDF文件第17页浏览型号PIC16F77-I/PT的Datasheet PDF文件第18页浏览型号PIC16F77-I/PT的Datasheet PDF文件第19页  
PIC16F7X  
2.2  
Data Memory Organization  
2.0  
MEMORY ORGANIZATION  
The Data Memory is partitioned into multiple banks,  
which contain the General Purpose Registers and the  
Special Function Registers. Bits RP1 (STATUS<6>)  
and RP0 (STATUS<5>) are the bank select bits:  
There are two memory blocks in each of these  
PICmicro® MCUs. The Program Memory and Data  
Memory have separate buses so that concurrent  
access can occur and is detailed in this section. The  
Program Memory can be read internally by user code  
(see Section 3.0).  
RP1:RP0  
Bank  
00  
01  
10  
11  
0
1
2
3
Additional information on device memory may be found  
in the PICmicroMid-Range Reference Manual  
(DS33023).  
2.1  
Program Memory Organization  
Each bank extends up to 7Fh (128 bytes). The lower  
locations of each bank are reserved for the Special  
Function Registers. Above the Special Function Regis-  
ters are General Purpose Registers, implemented as  
static RAM. All implemented banks contain Special  
Function Registers. Some frequently used Special  
Function Registers from one bank may be mirrored in  
another bank for code reduction and quicker access.  
The PIC16F7X devices have a 13-bit program counter  
capable of addressing an 8K word x 14-bit program  
memory space. The PIC16F77/76 devices have  
8K words of FLASH program memory and the  
PIC16F73/74 devices have 4K words. The program  
memory maps for PIC16F7X devices are shown in  
Figure 2-1. Accessing a location above the physically  
implemented address will cause a wraparound.  
2.2.1  
GENERAL PURPOSE REGISTER  
FILE  
The RESET Vector is at 0000h and the Interrupt Vector  
is at 0004h.  
The register file (shown in Figure 2-2 and Figure 2-3)  
can be accessed either directly, or indirectly, through  
the File Select Register FSR.  
FIGURE 2-1:  
PROGRAM MEMORY MAPS AND STACKS FOR PIC16F7X DEVICES  
PIC16F76/77  
PIC16F73/74  
PC<12:0>  
PC<12:0>  
13  
13  
CALL, RETURN  
CALL, RETURN  
RETFIE, RETLW  
RETFIE, RETLW  
Stack Level 1  
Stack Level 2  
Stack Level 1  
Stack Level 2  
Stack Level 8  
Stack Level 8  
RESET Vector  
Interrupt Vector  
0000h  
0000h  
RESET Vector  
Interrupt Vector  
0004h  
0005h  
0004h  
0005h  
Page 0  
Page 0  
On-Chip  
Program  
Memory  
07FFh  
0800h  
07FFh  
0800h  
Page 1  
Page 2  
Page 3  
Page 1  
On-Chip  
Program  
Memory  
0FFFh  
1000h  
0FFFh  
1000h  
Unimplemented  
Read as 0’  
17FFh  
1800h  
1FFFh  
1FFFh  
2002 Microchip Technology Inc.  
DS30325B-page 13