PIC16CR54C
COMF
Complement f
[ label ] COMF f,d
0 ≤ f ≤ 31
DECFSZ
Syntax:
Decrement f, Skip if 0
[ label ] DECFSZ f,d
0 ≤ f ≤ 31
Syntax:
Operands:
Operands:
d
[0,1]
d
[0,1]
Operation:
(f) → (dest)
Operation:
(f) – 1 → d; skip if result = 0
Status Affected:
Encoding:
Z
Status Affected: None
0010
01df
ffff
0010
11df
ffff
Encoding:
The contents of register 'f' are comple-
mented. If 'd' is 0 the result is stored in
the W register. If 'd' is 1 the result is
stored back in register 'f'.
The contents of register 'f' are decre-
mented. If 'd' is 0 the result is placed in
the W register. If 'd' is 1 the result is
placed back in register 'f'.
Description:
Description:
If the result is 0, the next instruction,
which is already fetched, is discarded
and an NOP is executed instead mak-
ing it a two cycle instruction.
Words:
1
1
Cycles:
Example:
COMF
REG1,0
Words:
1
Before Instruction
REG1
=
0x13
0x13
Cycles:
Example:
1(2)
After Instruction
HERE
DECFSZ
GOTO
CONTINUE •
CNT, 1
LOOP
REG1
=
W
=
0xEC
•
•
DECF
Decrement f
[ label ] DECF f,d
0 ≤ f ≤ 31
Before Instruction
PC
=
address (HERE)
Syntax:
After Instruction
Operands:
CNT
if CNT
PC
if CNT
PC
=
=
=
≠
=
CNT - 1;
0,
address (CONTINUE);
0,
d
[0,1]
Operation:
(f) – 1 → (dest)
Status Affected:
Encoding:
Z
address (HERE+1)
0000
11df
ffff
Decrement register 'f'. If 'd' is 0 the
result is stored in the W register. If 'd' is
1 the result is stored back in register 'f'.
Description:
GOTO
Unconditional Branch
Syntax:
[ label ] GOTO
0 ≤ k ≤ 511
k
Words:
1
1
Operands:
Cycles:
Example:
Operation:
k → PC<8:0>;
STATUS<6:5> → PC<10:9>
DECF
CNT,
1
Before Instruction
Status Affected: None
CNT
=
0x01
0
101k
kkkk
kkkk
Encoding:
Z
=
GOTOis an unconditional branch. The
9-bit immediate value is loaded into PC
bits <8:0>. The upper bits of PC are
loaded from STATUS<6:5>. GOTOis a
two cycle instruction.
Description:
After Instruction
CNT
=
0x00
1
Z
=
Words:
1
Cycles:
Example:
2
GOTO THERE
After Instruction
PC
=
address (THERE)
DS40191A-page 42
Preliminary
1998 Microchip Technology Inc.