PIC16F7X7
EXAMPLE 6-1:
CHANGING THE PRESCALER ASSIGNMENT FROM WDT TO TIMER0
CLRWDT
BANKSEL OPTION_REG
MOVLW
MOVWF
; Clear WDT and prescaler
; Select Bank of OPTION_REG
; Select TMR0, new prescale
; value and clock source
b'xxxx0xxx'
OPTION_REG
TABLE 6-1:
Address
REGISTERS ASSOCIATED WITH TIMER0
Value on
all other
Resets
Value on
POR, BOR
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1 Bit 0
01h,101h
TMR0
INTCON
Timer0 Module Register
xxxx xxxx uuuu uuuu
0Bh,8Bh,
GIE PEIE TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF 0000 000x 0000 000u
10Bh,18Bh
81h,181h
OPTION_REG RBPU INTEDG T0CS
T0SE PSA
PS2
PS1 PS0 1111 1111 1111 1111
Legend:
x= unknown, u= unchanged, - = unimplemented locations read as ‘0’. Shaded cells are not used by Timer0.
DS30498C-page 76
2004 Microchip Technology Inc.